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TMS320F28335: Problem with frequently updating action qualifier register setting

Part Number: TMS320F28335


Hi all,

To create a specific PWM pattern, I need to change ePWM ACTLA and ACTLB settings frequently. However, I noticed that change in the ePWM settings happens with a sample delay. This causes my code does not work properly. This is part of my code:

if (sector_rec==0)

{   	EPwm1Regs.AQCTLA.all = 2;		
	    EPwm1Regs.AQCTLB.all = 289;
	    EPwm2Regs.AQCTLA.all = 1;
	    EPwm2Regs.AQCTLB.all = 289;
	    EPwm3Regs.AQCTLA.all = 1;
	    EPwm3Regs.AQCTLB.all = 289;
}
else
{
   	EPwm1Regs.AQCTLA.all = 289;		
	    EPwm1Regs.AQCTLB.all = 1;
	    EPwm2Regs.AQCTLA.all = 289;
	    EPwm2Regs.AQCTLB.all = 1;
	    EPwm3Regs.AQCTLA.all = 289;
	    EPwm3Regs.AQCTLB.all = 2;

}

In this code, variable "sector_rec" changes after a while. I need to find a way to change AQCTLA(B) setting immediately. I appreciate any help.

Thank you in advance,

-Amir

  • Hello Amir,

    How much delay are you seeing? Are you dividing down your PWM clock at all? What is the size of your PWM period? Are you changing the CMPA or CMPB values also? Those registers do have a shadow register (it can be disabled) which waits until the next PWM cycle to load.

    The typical way of doing this would be to change the value of your CMPA and CMPB events instead of changing the action qualifier. Is it possible to make this scheme modification in your code? I suspect you would see much better results. Make sure you disable the shadow register if you need immediate effect.

    Regards,
    Kris
  • Hi Kris,

    Thank you so much for your answer. My sampling and switching frequency is 10 kHz and it seems there exists one sample delay in changing action qualifier setting. I should change both CMPA(B) and AQCTLA(B) to generate my desired PWM. The issue is that I am generating PWM for an inverter, but in my case, upper and lower switches are not complementary. For instance, I have this pattern

    EPWMA: 1-1-1
    EPWMB: 0-1-0

    and when variable "sector_rec" changes, PWMs will be as follows

    EPWMA: 0-1-0
    EPWMB: 1-0-1

    Also, the duty cycle of each state varies at each moment.
    I enable shadow for my current code, because when I disable it, my code seems do not work properly.

    Sincerely,
    -Amir
  • Amir,

    Thanks for the details. Can you clarify what you mean when you say one sample delay? I just want to confirm that you are saying that the next sample at 10 KHz after updating the AQ registers, you are still reading the old value. Is that correct?

    Have you used all of the other PWM modules on the device? Instead of using an A and B channel, it may be better to use a separate PWM module since they aren't complimentary.

    Can you post some waveforms of what you are seeing? Please indicate when the write to the AQ is made through a pin toggle as well.

    Regards,
    Kris
  • Kris,

    Thank you, as I see again the results, apparently, the AQCTL register changes firstly and duty cycle values update with a delay. I add the figure. As you can see, when sec_rec changes, I expect to not have zero value (specified by red circle) in the ePWMA1 and instead, it should be unity. I should mention that the value of EPwm1Regs.CMPA.half.CMPA was significant just before sec_rec gets zero.

    Thanks,

  • Amir,

    Can you make sure the the shadow to active mode for the CMPA and CMPB registers is set to immediate?  I think this may solve your problem.

    The shadow mode delays the loading of the new CMPA and CMPB value until the next cycle.

    Regards,

    Kris

  • Kris,

    I will try again and update you.

    Thanks,

  • Hi Kris,

    Sorry because of delay. I tried to change shadow register mode to immediate, but it does not work for me. The following is part of my code related to EPWMA and may help you to diagnose the problem. Thanks

    EPwm1Regs.TBCTL.all = (EPwm1Regs.TBCTL.all & ~0x3FBF) | 0x12;//it is for up-down mode
    EPwm1Regs.TBCTL.bit.CTRMODE =0; // change to up Mode
    EPwm1Regs.TBPRD = tsw;
    EPwm1Regs.TBPHS.all = (EPwm1Regs.TBPHS.all & ~0xFFFF0000) | 0x0;
    EPwm1Regs.TBCTR = 0x0000; /* Clear counter*/
    EPwm1Regs.CMPCTL.all = (EPwm1Regs.CMPCTL.all & ~0x5F) | 0x1;
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = 1; // Compare A block operating mode.
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = 1; // Compare B block operating mode.
    EPwm1Regs.CMPA.half.CMPA = tsw;
    EPwm1Regs.CMPB = 0;
    EPwm1Regs.CMPCTL.bit.LOADBMODE = 0;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
    EPwm1Regs.AQCTLA.all = 288; // Setup Action-Qualifier (AQ) Submodule: ZRO = set, PRD = clear
    EPwm1Regs.AQCTLB.all = 0;//do nothing
    EPwm1Regs.AQSFRC.all = (EPwm1Regs.AQSFRC.all & ~0xC0) | 0x0;
    EPwm1Regs.ETSEL.all = (EPwm1Regs.ETSEL.all & ~0xFF0F) | 0x1A01;
    EPwm1Regs.ETPS.all = (EPwm1Regs.ETPS.all & ~0x3303) | 0x1101;