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TMS320F28379D: Hardware support for puls skippig at min or max Dutycycle of the ePWM modul

Jan Hummel53
Intellectual 310 points
Part Number: TMS320F28379D

Is there a possibility to configure the ePWM modul of the TMS320F28379D to have a minimum duty cycle or switch to a 0 or 100% duty cycle without software calculations with the CPU or CLA?

 

For example: if you have a minimal duty cycle of 3 or 97% and you want to have a duty cycle of 98% the Hardware should behave like this:

target PWM=98%, min. PWM= 97%

x = target PWM - actual PWM

 

PWM Clock

target PWM + x

actual PWM

x

1

98%

97%

1%

2

99%

100%

-1%

3

97%

97%

0

4

98%

97%

1%

5

99%

100%

-1%

6

97%

97%

0

 

In this Example the average duty cycle is the desired 98%.

Did anyone see a possibility to configure the Hardware of the EPWM modul to work like this without any extra calculations of CLAs or CPUs?

  • 0
    TI__Genius 15260 points
    Hi Jan,

    I want to clarify that I understand what you are requesting. You are saying that if your target duty cycle is 97% and a value for >97% is programmed, the EPWM will automatically switch it to 100%. Is that correct?

    Regards,
    Kris
  • 0 in reply to Kris Parrent
    Intellectual 310 points

    Hi Kris,

    Thanks for your reply. With the EPWM Module I want to switch IGBTs.  I don’t want to have very short pulses of the IGBT. So if there is a desired Duty cycle of e.g. 98% and I want to have a minimum duty cycle of 97%.  When the Epwm modul is running every 3 cycles it should switch two times with a duty cycle of 97% and one time with a duty cycle of 100%. So the Average duty cycle is 98%. 

    Regrads,

    Jan

     

  • 0 in reply to Jan Hummel53
    TI__Genius 15260 points
    Jan,

    Thank you, I understand the goal now. The no software overhead here is the tricky part. Assuming you know what the corresponding CMPx value changes are, the method I would look into is a DMA trigger which copies in the new values.

    So you would write whichever values you needed for 97% into a RAM location and the values you needed for 100% into another RAM location.

    You should be able to use a PWM SOC to trigger a DMA transfer. Note- that SOC could be generated from the PWMs you're using or a different PWM (or multiple)- and it doesn't actually have to initiate an ADC SOC. It will just trigger the DMA.

    Regards,
    Kris
  • 0 in reply to Kris Parrent
    Genius 5885 points

    This is called dithering and you will have to do it in software. But it does not require a lot of resources.

    We've used it succesfully to increase duty cycle resolution when using HRPWM was not an option. Also one can set PWM frequency with higher precission using dithering.

  • 0 in reply to Mitja Nemec
    Intellectual 310 points

    @ Kris: The target value for the 98% is the example above is a value which can change every Period. For example when in the first cycle 99% is a target value and it got rounded up to 100%. The next target value e.g. 80% should be reduced by 1% to 79%.  So your idea would not work?

    @Mitja Nemec: Yes i want to have a kind of dithering, with a calculated value from the error of the last period, not a random noise value. The calculated error should contain the difference between the target value and the actual value written in the CMPx register when the actual value got rounded while it was between 0-3%or 97-100% duty cycle. The calculated error can also include the quantization error when converting a 32-Bit value in a 16-Bit value. That’s a good idea.

    I think I have to do it in software? Or did anyone see another solution in hardware?

  • 0 in reply to Jan Hummel53
    TI__Genius 15260 points
    Correct- if the values are dynamic you will need to do the calculations in software.

    Regards,
    Kris