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TMS320F28377D: Cpu 2 not able to restart execution from main after first reset

Aashutosh Joshi
Prodigy 50 points
Part Number: TMS320F28377D


I have implemented a software which uses internal watchdog timers for cpu 1 and cpu 2.

Cpu2 on 1st wdt generates interrupt to cpu2 itself and in ISR wdt is configured to reset mode after saving debugging info.

On 2nd cpu 2 wdt timeout..Core 2 resets and generates NMI on cpu 1. After 5 such cycles..I reset cpu core 1.

This is working fine in debugging environment as after core 2 reset I reload/restart execution from cpu 2 main

However, when I flash hex files..Cpu 2 resets only once (written a test logic to generate wdt timeout after 10 sec)

Execution doesn't return to main. Code_start location on map file seems to be okay.

Please suggest ways to resolve this issue so that after core 2 reset..Cpu 2 execution returns to main.

  • 0
    TI__Guru** 115881 points
    Hi Aashutosh,

    After CPU2 gets reset by WD, CPU2 BOOT-ROM will get executed which will put the CPU2 into IDLE state. In CPU1 NMI handler (on CPU2 reset) you need to use IPC command to boot CPU2 from Flash (just like it's done when both the CPU gets reset).

    Regards,
    Vivek Singh
  • 0 in reply to Vivek Singh
    Prodigy 50 points
    Hi Vivek,
    Thanks a lot for the solution. By yesterday..I had come to the conclusion that core 2 is not able to execute after reset. However, everything was correct in map files and linker command files.
    I'm new to this dual core DSP world and hence wasn't aware about this specific requirement of booting core 2.
    Overall, a good learning curve for me.

    Thanks,
    Aashutosh