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TMS320F28022: SCI start bit detection timing

Part Number: TMS320F28022



Hello,

Please tell me about SCI SWRESET.
When initializing with SWRESET (active low), when SWRESET = 0 is set to 1 and enabled again, at what timing is
the start bit detection of the received data started?

Below, is understanding correct?

· SCI state machines and flags are initialized within one clock of SCICLK (Internal).
· Detection of start bit starts in the next SCICLK. (After one SCICLK after SWRESET = 1)


Best Regards,
Koichi

  • Koichi-san,

    After SWRESET=1, the detection of a start bit may happen in less than 1 bit time. It is oversampled, however I am not sure at what rate. Detection of a start bit does not wait for the next SCICLK, if a start bit is present at the same time as SWRESET = 1 you may see a delay smaller than 1 bit time.

    The SCI state machine is reset when "SWRESET = 0" and should start immediately after "SWRESET = 1".

    Regards,
    Cody

  • Cody-san

    Thank you for your support.

    I understood that start bit detection will start as soon as SCI becomes valid (SWRESET = 1 set).

    Best regards,
    Koichi