Other Parts Discussed in Thread: CONTROLSUITE
Hello! So I'm testing out the low power mode to see if I can get my board to draw less current during certian times, but i'm getting a lot higher current draw than i would expect when i put the chip into idle Mode (either in idle, standby, or halt). Right now my code starts up, sets the PLL to multiply and divid my clock by 3 and 1 respectively (so sysclock is 30MHz) , does a check to see if i'm bootloading firmware (takes about 5 seconds) and then goes into idle mode. Below are the current draws i'm seeing in the different modes:
Idle Mode: 38 mA
Standby Mode: 37.5mA
Halt Mode: 34.4 mA
From the data sheet, the highest i would expect to see anything is 22mA, I'm sure i'm just not setting something up correctly, but i'm not sure what that is. I even tried loading the example code for the HaltWake, and my current draw was still around 35mA or so.
Please note that I only have the F28069 populated on the board, along with the bootmode pullup resistors, and a couple filter caps on the 3.3V and 1.8V VDD pins, so there isn't anything else on the board to be drawing that extra current. Let me know if anyone has any ideas of what i might be doing wrong. Thanks!!