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TMS320C28346: About the timing strobe signal changes at the XTIF

Keirs
Expert 2605 points
Part Number: TMS320C28346

Hello.

I have a question.

 

When I calculate total access XTIMCLK cycles to judge which strobe signal changes at rising edge or falling edge of XCLKOUT,

is my understanding correct following flow according to section 6.15.4 in the sprs516d ?

Parameter:

   LR = 4

   AR = 10 + 1(including WS)

   TR = 2

   XTIMCLK = 300MHz

   XCLKOUT = 75MHz

   XZCS is active low

   XRD is active low

1.XZCS changes from high to low aligned to rising edge of XCLKOUT at the beginning of lead period.

2.XRD changes from high to low aligned to rising edge at the beginning of active period.

   Because LR (= 4) is even.

3.XRD changes from low to high aligned to falling edge of XCLKOUT cycles.

   Because LR + AR( = 15) is odd.

4.XZCS changes from low to high aligned to falling edge of XCLKOUT cycles.

   Because LR + AR + TR ( = 17) is odd.

Should I calculate total XTIMCLK cycles including Aligned Cycles ?

Regards,

uchida-k 

  • 0
    Expert 2605 points
    Hello.

    Do you have something updates about this question?

    Regards,

    uchida-k
  • 0 in reply to Keirs
    Expert 2605 points

    In other words,will  it look like this figure?

    7282.XINTF_Signals.pdf

    Regards,

    uchida-k

  • 0 in reply to Keirs
    TI__Guru 62975 points

    Uchida-k,

    Sorry for the delay.  After reviewing the waveforms from the XINTF Reference Guide, I believe that your signals would look like this:

    -Tommy

  • 0 in reply to tlee
    Expert 2605 points
    Hi Tommy,

    Thank you for your reply.

    Would you tell me reason why XINTF signals would look like this?

    In the sprs516d, at the page of 144,
    it seems to be described that strobes( such as XRD, XWE0,XWE1, and XZCS )that changes at the begining of the trail period will align to the "XCLKOUT".

    I think XRD that changes at the begining of trail period align to the falling edge of XCLKOUT because lead + active XTIMCLK cycles is 15.

    Could you tell me when alignment cyclse will be inserted?

    Regards,
    uchida-k
  • 0 in reply to Keirs
    TI__Guru 62975 points

    Uchida-k,

    The example alignments on that page apply to XCLKOUT = one-half XTIMCLK only.  Mention of the one-fourth XTIMCLK ratio is an error.

    All XINTF signals are synchronized to XTIMCLK, however memory accesses are guaranteed to start relative to a rising XCLKOUT edge.

    In the case where XCLKOUT = one-half XTIMCLK, we are able to use the even or odd XTIMCLK cycle-count to predict if signal transitions will coincide with a rising or falling XCLKOUT edge.

    In the case where XCLKOUT = one-fourth XTIMCLK, the signals may transition while XCLKOUT is static.

    Alignment cycles are inserted when the XINTF is ready to start a memory access, but it needs to wait for the next rising edge of XCLKOUT.

    -Tommy

  • 0 in reply to tlee
    Expert 2605 points
    Hi Tommy,

    Thank you for your reply.
    I understand.

    I'm waiting for correct the document: sprs516d in next release.

    Regards,
    uchida-k