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TMS320F28075: About swprioritized interrupts example

Sh.Sasaki
Guru 13625 points
Part Number: TMS320F28075
Other Parts Discussed in Thread: CONTROLSUITE

Hi everyone,

I'm using following example.

C:\ti\controlSUITE\device_support\F2807x\v210\F2807x_examples_Cpu1\sw_prioritized_interrupts

I have two questions about this example.

(1)  This example isn't crear adc interrupt flag. (ISRSWPrioritizedInterrupts.c ,  __interrupt void ADCA1_ISR( void )  )

Why does it work correctly, even though flags are not cleared as shown below?

 AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag

(2)  If this C(ISRSWPrioritizedInterrupts.c) source file is used, will TIMER 1 _ ISR be the interrupt with the lowest priority?

#if (INT13PL != 0)
__interrupt void TIMER1_ISR(void) // INT13 or CPU-Timer1
{
IER |= MINT13; // Set "global" priority

/*Do not I need to set masks IER or PIEIER here?*/

EINT;

//

// Insert ISR Code here.......
//

// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
__asm (" ESTOP0");
for(;;);
}
#endif

Best reagrds

Sasaki

  • 0
    TI__Guru 54195 points

    Hello,

    1. The example forces the interrupt at the PIE level by setting the PIEIFR bit, so the ADC interrupt flag isn't actually being set and doesn't need to be cleared. However, in a real application when the ADC interrupt is being triggered by an actual hardware event, you will need to add the code to clear the flag.

    2. TIMER1_ISR's priority is determined by the value of INT13PL in the F2807x_SWPrioritizedIsrLevels.h file. In response to your comment, the code doesn't set the mask in PIEIER because the Timer 1 interrupt is in the CPU only--it is not a PIE interrupt.


    Whitney

  • 0 in reply to Whitney Dewey
    Guru 13625 points

    Hi Whitney-san,

    Thank you for your answer.

    I understood it.

    Best regards,

    Sasaki