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TMS320F28377S: How to implement a circular buffer with DMA that wraps correctly?

Part Number: TMS320F28377S


Hi

I have the TI DSP TMS320F28377S and I want to use the SPI module together with a DMA channel.

Configuration of the DMA channel is:

  • Interrupts disabled
  • oneshot disabled
  • continous disabled
#define BURST           1                      // Burst size is 2 words (2x 16 Bit)
DMACH5BurstConfig(BURST,1,0);         // Burst size, src step, dest step
DMACH5TransferConfig(TRANSFER,1,0);   // transfer size, src step, dest step
DMACH5ModeConfig(DMA_SPIATX,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,
                 SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,
                 CHINT_END,CHINT_DISABLE);

The DMA channel uses a buffer whis holds e.g. 256 double words. And the Burst size is 2 words.
The DMA Buffer contains kind of frames, which aren't the same length all the time. So I calculate the transfer size before each start of the DMA channel.
So I don't process the whole DMA buffer at once. I only process frame after frame. For every frame transmission a new transfer is started.

I set the wrap size to (2*256) / 2 = 256 which means that there will be a wrap after 256 bursts. This is when the end of the DMA buffer has reached.
I then wraps to the Wrap Address. Wrap step is kept at 0.

But my problem is, that the wrap count is set to wrap size (256) at the beginning of each transfer.

This can also be seen in the Reference Manual, Figure 4.7: http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spruhx5d

I wonder how I setup the wrap size or the DMA channel correctly to use the DMA buffer as a circular buffer.

Kind regards
Phil

  • Hi Phil,

    Unfortunately, the hardware wrap functionality isn't really meant to work in a scenario where the wrap size needs to be bigger than the transfer size. Like the TRM says, "To disable the wrap function, assign the value of these registers to be larger than the TRANSFER_SIZE."

    I'm trying to think of other solutions that could prevent you from having to do the wrapping in software, but not coming up with much yet. I'm guessing the the biggest possible transfer size you'll need to be able to handle is the full 256 bursts?

    Whitney
  • Hi Whitney

    Thanks for your reply. That's also what I've come up with. I just can't use the hardware wrap functionality how I wanted to.

    I don't have any transfers that need to handle the full 256 bursts. the transfersize is always below mostly a half or a third of it.

    I think that I have to make sure that there will be no wrap around "frames" when filling the DMA buffer. But this ist not an efficient circular buffer handling like i intended to use then. But it might be acceptable anyhow.

    Phil