This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D: Boot from flash without GPIO?

Part Number: TMS320F28377D
Other Parts Discussed in Thread: CONTROLSUITE, C2000WARE

Team,

I've been reading through TRM sections on booting as well as SPRA958L (Running an Application from Internal Flash Memory) but I can't seem to find the answer. 

My problem is: I don't currently have any free GPIOs on a reference design we have built.

My question is, is there a way to boot from flash without relying on GPIO? i.e. ROM bootloader points directly to flash always

If this is not possible, would it be a fair assumption that I can use pins that are allocated for I2C (and thus, pulled up) to get the device in Get Mode/Flash state during RESET and then they can go back to being initialized as I2C pins? Is there a better alternative? Open to suggestions.

Best,

  • Hi,

    My question is, is there a way to boot from flash without relying on GPIO? i.e. ROM bootloader points directly to flash always.

    You need BOOTMODE pins to be driven 1/1 to select the GetMode/Flash Boot.

    If this is not possible, would it be a fair assumption that I can use pins that are allocated for I2C (and thus, pulled up) to get the device in Get Mode/Flash state during RESET and then they can go back to being initialized as I2C pins? Is there a better alternative? Open to suggestions.

    You can do that but I would suggest to select device pins, which are used as output in your application, as BOOTPIN so that these are not driven by external device in any situation.  

    Regards,

    Vivek Singh

  • Hi Vivek,

    Is it fair then to choose SCL pin as both and therefore it is being driven by master (c2000) and also pulled high at reset?

    Best,
    Lina
  • Lina,
    the device boot ROM looks for the status on the factory default boot mode select GPIOs (GPIO72 and GPIO84) unless user has programmed an alternate boot mode select pins configuration through user OTP (section 3.4 of device TRM).

    for ex:- if you don't want to use GPIO72 and GPIO84, but want to use GPIO33 (for example), then program BOOTCTRL.BMSP0 as 34 (for GPIO33) and BOOTCTRL.BMSP1 as 34 (for GPIO33), you can leave BOOTCTRL.BMODE as unprogrammed (=0xFF) (or set it to 0x0B for flash boot) and program BOOTCTRL.key as 0x5A on CPU1.

    In the above example, now device will boot to flash if GPIO33 is HIGH and will start Parallel boot if GPIO33 is LOW.

    Refer to section 3.4, but the part needs to have OTP register programmed for above unless the respective OTP register is programmed the device boot ROM checks for factory default boot mode configurations.

    Edit/update :- The device TRM for F2837xD can be found at http://www.ti.com/lit/ug/spruhm8f/spruhm8f.pdf



    Hope this helps.

    Best Regards
    Santosh Athuru

  • Hi Santosh, Hi Vivek,

    Thanks for the responses. I plan to use one GPIO that is currently being used for trip zone that is pulled up (GPIO 90), meaning BOOTCTRL = 0x8989xx5A

    I also plan to have external SPI flash, which means BMODE (xx) above should be 0x84 for SPI1.

    Regarding programming OTP, I've looked around and found some resources on SPI boot etc. that is described here:
    www.ti.com/.../spraaq3.pdf

    Since we have an external SPI flash, I plan to use the SPI bootloader mentioned in the document above, but this was created for the F280x family. Can you provide guidance on if this can be used on F28377D and what changes need to be made, if any?

    Best,
  • Lina,

    for GPIO90 you will have to program decimal 91, which means hex 5B. So your BOOTCTRL will be 0x5B5B845A.

    Once you program such then device will always boot to SPI when the boot mode select pins are HIGH. and to Parallel boot when they are low. In your case device boots to SPI when GPIO90 is HIGH and Parallel boot when GPIO90 is low. Note that in the SPI boot mode the device acts as SPI master and if no SPI slave responds back to the SPI reads or if a bad key is read then device defaults to boot to flash. Please check if this meets your requirements.

    The app note you are referring to is for programming a loader to user OTP. We don't have that option available on the F2837x devices. Further the app note talks about a modified SPI flash loader for customers and I don't think you are looking for that.

    The SPI Boot loader in ROM loads an application from an external SPI EEPROM onto the device RAM. The device boot ROM sources for your device can be found in controlSuite (C:\ti\controlSUITE\libs\utilities\boot_rom\F2837x_revb\revb_rom_sources).

    Section 3.13 of the device TRM explains the boot data stream structure expected by the ROM loaders when a peripheral read from the ROM loader completes.

    Hope this helps.

    Best Regards
    Santosh Athuru

  • Hi Santosh,

    Thanks again for your help. Rather than SPI boot, we've decided to go for internal flash boot. I just want to confirm a few things before I program the OTP. Do we have a document describing how to program OTP including nuances like programming ECC? I was reading through a couple of forum posts as well as the source code instructions in blinky with dcsm example, but I confused myself more if anything.

    To clarify, I am using a custom board and trying to use different GPIO from default to have the device boot every time from flash when an emulator is not connected. I plan to use GPIO90 (only one GPIO) as both boot pins.

    That being said, and using Blinky_with_dscm example, do I understand the procedure correctly? :
    1. Change 2837xD_dcsm_lnk_cpu1.cmd by removing type=DSECT from dcsm_otp_z1_bootctrl section ONLY (is there another section that should be removed? What does this do exactly?)
    2. In DCSM_Z1_ZoneSelectBlock.asm, uncomment the two lines of code under .sect "dcsm_otp_z1_bootctrl" to set .long 0x5B5B0B5A to set to getmode (question, do I leave "reserved" section commented, or set it to 0xFFFFFFFF?)
    3. Build and load
    4. Power device, GPIO90 pulled up, observe blinky program?

    Questions:
    1. Again, is there any clear documentation on steps for programming OTP?
    2. Is there any other consideration when doing so? (ECC, linkpointer, etc)
    3. Is there a way to test this functionality before programming OTP?
    Best,
  • Lina,

    OTP is just like flash but it is One Time programmable only. Yes, OTP memory has ECC. The steps you put above looks good. Other than the example provided we don't have other documentation on how to program OTP.

    As I mentioned OTP is just like flash but one time programmable. Customer can program the OTP memory just like a flash sector/memory. However most of the user OTP is registers defined for boot and security module so we have put the example and source level comments on how to program these. We didn't include these in all other examples because we didn't want customers to program the OTP memory accidentally. We made an effort to make sure customer programs the OTP consciously.

    You can test the OTPBOOTCTRL register value before programming OTP by using the same value in EMUBOOTCTRL and doing the EMUBOOT sequence (running boot ROM with emulator connected). Refer to Figure 3.3 Page 498 of the device TRM.

    The ROM source code for your device is provided in controlSuite C:\ti\controlSUITE\libs\utilities\boot_rom\F2837x_revb\revb_rom_sources; You can load ROM symbols without having to rebuild the ROM project and do source level debug of ROM code.

    Hope this helps.

    Best Regards

    Santosh Athuru

  • Hi Santosh,

    Thanks for your help. I have a couple of clarifying questions to make sure I understand:

    1. When I imported the "blinky_with_dcsm" project, it seems that the 2837xD-dcsm_lnk_cpu1.cmd" file was not included in the build. I ended up including it (Properties -> C2000 Linker -> File Search Path -> Add), but is this a necessary step? Or was it called somewhere else?
    2. The linker file mentioned above, defines Z1 and Z2 OTP incorrectly it seems... 

       DCSM_OTP_Z2_BOOTCTRL    : origin = 0x7821C, length = 0x000004

    Shouldn't this be 0x7821E? This caused me to program 1C incorrectly, but it looks like that area is reserved anyway?

    3. The revb_rom_source you mentioned in ControlSuite does not have any release files to load symbols. The Rev0 folder has a Release folder, but inside it is only an .xml file. What is that .xml file for? Am I looking in the wrong place for the .out file?

    Appreciate your help!

    Best,

  • Hi Lina,

    _Lina said:
    When I imported the "blinky_with_dcsm" project, it seems that the 2837xD-dcsm_lnk_cpu1.cmd" file was not included in the build. I ended up including it (Properties -> C2000 Linker -> File Search Path -> Add), but is this a necessary step? Or was it called somewhere else?

    When I import the project and do the RAM build, I see that 2837xD_dcsm_lnk_cpu1.cmd is included.  If we do the flash build then the dcsm linker command file is not included. So only the RAM build is supported for this example. We should have removed the Flash build configuration.

    _Lina said:
    1. The linker file mentioned above, defines Z1 and Z2 OTP incorrectly it seems... 

       DCSM_OTP_Z2_BOOTCTRL    : origin = 0x7821C, length = 0x000004

    Shouldn't this be 0x7821E? This caused me to program 1C incorrectly, but it looks like that area is reserved anyway?

    for above, if you look at the code that defines the data for the DCSM_OTP_Zx_BOOTCTRL, you will see below. The first 32 bits are reserved and programmed as 0xFFFFFFFF, the BOOTCTRL value is the next 32 bits. Both these 32 bit words share ECC so they are grouped together.

    So yes the BOOTCTRL are at 0x7801E and 0x7821E for Z1 and Z2 respectively, but the section that links these is actually four 16 bit words as the Reserved takes two addresses and the BOOTCTRL takes the next two addresses. 

    .sect "dcsm_otp_z1_bootctrl"
    ;; .long 0xFFFFFFFF ;Reserved
    ;; .long 0xFFFFFFFF ;Z1-BOOTCTRL

    .sect "dcsm_otp_z2_bootctrl"
    ;; .long 0xFFFFFFFF ;Reserved
    ;; .long 0xFFFFFFFF ;Z2-BOOTCTRL

    _Lina said:
    The revb_rom_source you mentioned in ControlSuite does not have any release files to load symbols. The Rev0 folder has a Release folder, but inside it is only an .xml file. What is that .xml file for? Am I looking in the wrong place for the .out file?

    for above, I do see the OUT file at below location for REVB.

    "C:\ti\controlSUITE\libs\utilities\boot_rom\F2837x_revb\revb_rom_sources\ccs_files\cpu01\Release\F2837x_cpu01_bootROM_REVB_Golden_020314.out"

    When you click load symbols from CCS debug perspective, just point to the above COFF file and when CCS asks for no source found for source level debug, just point it to C:\ti\controlSUITE\libs\utilities\boot_rom\F2837x_revb\revb_rom_sources\F2837x_bootROM\cpu01-bootROM\source. This should let you do source level debug of ROM code.

    Hope this helps.

    Best Regards

    Santosh Athuru 

  • Hi Santosh,

    Thanks for your quick reply. I finally had the confidence to flash OTP and it was a success! Based on your responses above, I'm editing the procedure I mentioned before so that others may find it.

    Procedure for changing boot pins by flashing OTP on F2837xD:

    Objective: Change default boot pins on custom board from GPIO84, GPIO72 to GPIO91 which was pulled up in the design.

    NOTE: Value in BOOTCTRL is dissected as follows (more info in Section 3.4 of TRM):

    BMSP1/0 = HEX(GPIO number + 1), for example: For GPIO91, BMSP1 = 91+1 = 92 = 0x5C

    BMODE = Flash = 0x0B

    Key = Valid = 0x5A

    Value to write to "dcsm_otp_z2_bootctrl" = 0x5C5C0B5A

    1. Open CCS, download C2000ware, import "blinky_with_dcsm_cpu1" to workspace.

    2. Change 2837xD_dcsm_lnk_cpu1.cmd by removing type=DSECT from dcsm_otp_z2_bootctrl section ONLY (which makes it a valid section)

    3. In DCSM_Z1_ZoneSelectBlock.asm, uncomment the two lines of code under .sect "dcsm_otp_z2_bootctrl" to set .long 0x5C5C0B5A to set to getmode 
    4. Build and load

    5. Verify it was successful by View -> Memory Browser (dropdown = 32 bit hex TI style), type in BOOTCTRL address: 0x7821E

    Now, when an image is flashed, emulator is disconnected and  GPIO91 is pulled up, the C2000 will boot from flash.

    NOTE: Regarding the revb_rom_sources and other rom files in ControlSuite - for some reason, I do not see the same files you mentioned in the Release folder...perhaps my ControlSuite didn't download properly. Now that my main objective works, I'll mark this post as answered.

  • Lina,
    Awesome. thanks for posting back the steps to Forum.

    Best Regards
    Santosh Athuru