Other Parts Discussed in Thread: CONTROLSUITE
Tool/software: Code Composer Studio
Hi,
I am trying to establish communication from 28035 to SIM900 Module.
Please suggest me how to proceed.
ITS URGENT..
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Tool/software: Code Composer Studio
Hi,
I am trying to establish communication from 28035 to SIM900 Module.
Please suggest me how to proceed.
ITS URGENT..
yes I am doing like what u said only.
pls correct me if I AM wrong at some where.
FOR YOUR UNDERSTANDING PLEASE FIND THE ATTACHED CODE.
I am getting error at the line: 141 ( msg = "AT+SAPBR=3,1,"Contype","GPRS" ";)
/**********FRAME FORMAT*************/
/***********************************/
//Header detect
//Device ID, Frame Size
//D1
//D2
//D3
//Dn
//Crc
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
#include "DSP2803x_Device.h" // Headerfile Include File
#include "DSP2803x_Examples.h" // Examples Include File
#define MAX_FRAME_DATA_SIZE 32//10 //NO OF 16 BIT DATAS // multiples of two 8 bit
#define BUFFER_SIZE 64 //Should be more than 2x size of data size
//unsigned char Tx_frame[BUFFER_SIZE],Tx_Frame_len = 4; // 60 8-bit
char Tx_frame[BUFFER_SIZE],Tx_Frame_len = 0; // 60 8-bit
char Rx_frame[BUFFER_SIZE], Rx_Frame_len = 0;
#define Device_ID 0x01 //DEVICE ID
#define FRAME_HEADER 0xAABB //COMM FRAME DETECT HEADER
void transmit_dat(char nDATA, char Tx_DEVICE_ADDRESS);
void clear_Rx_frame(void);
void clear_Tx_frame(void);
char scia_xmit(char a);
char scia_msg(char *msg);
volatile char temp_address = 0x01;
unsigned int CRC16( char * pucFrame, char len );
__interrupt void sciaTxFifoIsr(void);
__interrupt void sciaRxFifoIsr(void);
void scia_fifo_init(void);
struct BYTE
{
char Lo_byte:8;
char Hi_byte:8;
};
union DATA_BIT16
{
unsigned int BIT_16;
struct BYTE byte ;
};
volatile char Rx_Data_Received = 0,CRC_Check_begin = 0;
union DATA_BIT16 Rx_Data[MAX_FRAME_DATA_SIZE];
union DATA_BIT16 Tx_Data[MAX_FRAME_DATA_SIZE];
char *msg;
char Tx_buffer_index = 0;
static const char aucCRCHi[] = {
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
0x00, 0xC1, 0x81, 0x40
};
static const char aucCRCLo[] = {
0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
0x41, 0x81, 0x80, 0x40
};
// Transmit a character from the SCI
char scia_xmit(char a)
{
while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
SciaRegs.SCITXBUF=a;
return a;
}
char scia_msg(char * msg)
{
int i;
i = 0;
while(msg[i] != '\0')
{
scia_xmit(msg[i]);
i++;
Tx_buffer_index++;
}
return msg[i];
}
void transmit_dat(char nDATA, char Tx_DEVICE_ADDRESS) //Enter "no Of data", "To address", use "Tx_data[]" array to store Tx data
{
unsigned int CRC_dat = 0;
Tx_frame[0] = FRAME_HEADER>>8; // Sending Data MSB first
Tx_frame[1] = FRAME_HEADER; // Frame Header
Tx_frame[2] = Tx_DEVICE_ADDRESS; // To Address
msg = "AT+SAPBR=3,1,"Contype","GPRS" ";
Tx_frame[Tx_buffer_index++]= scia_msg(msg);
CRC_dat = CRC16( (char*)(Tx_frame+4), (nDATA*2)); //Calculate 16 bit CRC
Tx_frame[26] = CRC_dat;
Tx_frame[27] = CRC_dat>>8; // 0*(Tx_data+m) >> 8 //Assign CRC to Tx_frame
Tx_frame[28] = 0x0022;
Tx_Frame_len = Tx_buffer_index;
Tx_frame[29] = 0x00E3;
Tx_frame[30] = 0x00E0;
Tx_frame[31] = Tx_buffer_index;
GpioDataRegs.GPASET.bit.GPIO6 = 1; //Write 1 to Enable Pin
SciaRegs.SCICTL1.bit.TXENA = 1; //Enable Transmission Interrupts.
}
unsigned int CRC16( char * pucFrame, char len ) //Checks CRC from reference Table.
{
char ucCRCHi = 0xFF;
char ucCRCLo = 0xFF;
int iIndex;
while( len-- )
{
iIndex = ucCRCLo ^ *( pucFrame++ );
ucCRCLo = (char)( ucCRCHi ^ aucCRCHi[iIndex] );
ucCRCHi = aucCRCLo[iIndex];
}
return ( unsigned int )( ucCRCHi << 8 | ucCRCLo );
}
void clear_Rx_frame(void) //Clears Rx_frame
{
char j;
for(j = 0;j < BUFFER_SIZE; j++)
{
Rx_frame[j] = 0;
}
}
void clear_Tx_frame(void) //Clears Tx_frame
{
char j;
for(j = 0;j < BUFFER_SIZE; j++)
{
Tx_frame[j] = 0;
}
}
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the DSP2803x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
// These functions are in the DSP2803x_EPwm.c fileq
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitTzGpio();
// InitSciGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2803x_PieCtrl.c file.
InitPieCtrl();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2803x_DefaultIsr.c.
// This function is found in DSP2803x_PieVect.c.
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected register
PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
PieVectTable.SCITXINTA = &sciaTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
InitAdc();
GpioDataRegs.GPBCLEAR.bit.GPIO32 = 1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
scia_fifo_init(); // Init SCI-A
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
//PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, INT1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
IER |= M_INT1; // Enable CPU Interrupt 1
IER |= M_INT9;
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
clear_Rx_frame();
clear_Tx_frame();
for(;;)
{
clear_Tx_frame();
transmit_dat(30,temp_address); //
if(CRC_Check_begin == 1)
{
CRC_Check_begin = 0;
if(CRC16( (char*)(Rx_frame+4), Rx_Frame_len) == 0)
{
int t_rx_pos = 0, rx_pos = 4;
while(t_rx_pos < ((Rx_Frame_len-2)/2))
{
Rx_Data[t_rx_pos].byte.Hi_byte = Rx_frame[rx_pos++];
Rx_Data[t_rx_pos++].byte.Lo_byte = Rx_frame[rx_pos++];
}
t_rx_pos = 0;
rx_pos = 0;
Rx_Data_Received = 1;
}
else
{
Rx_Data_Received = 0;
}
clear_Rx_frame();
Rx_Frame_len = 0;
}
}
}
__interrupt void sciaRxFifoIsr(void)
{
/*
Things to do in rx_isr
->reset rx_pos if 2 consecutive comparisons fail
->assert header detect = 0;
->if rx is started enable rx_receiving = 1, start counter and reset everything(to make sure the code doesnt get struck in half frame state)
->set check_CRC flag when the rx_frame length is equal to specified frame length - done
->check crc outside isr loop - done*/
static volatile unsigned char Header_detect = 0,rx_pos = 0,rx_isr_count = 0;
rx_isr_count++;
while(SciaRegs.SCIFFRX.bit.RXFFST != 0)
{
Rx_frame[rx_pos++] = SciaRegs.SCIRXBUF.all;
}
if(Header_detect == 1)
{
if((rx_pos-4) >= Rx_Frame_len)//if(t_rx_pos >= rx_pos)
{
CRC_Check_begin = 1;
Header_detect = 0;
rx_pos = 0;
rx_isr_count = 0;
}
}
else if(Rx_frame[0] == 0xAA)
{
// Rx_frame_detected = 1;
if(Rx_frame[1] == 0xBB)//(Rx_frame[2] == Device_ID))// && (rx_isr_count == 2 ))
{
if(rx_pos > 3)
{
Rx_Frame_len = Rx_frame[3];
Header_detect = 1;
}
}
}
else if((rx_pos >= 4) && (Header_detect == 0))
{
rx_isr_count = 0;
rx_pos = 0;
Rx_frame[0] = 0x00;
Rx_frame[1] = 0x00;
Rx_frame[2] = 0x00;
Rx_frame[3] = 0x00;
}
SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ack
}
/*
Things to do in rx_isr
disable Tx_int when Tx_frame is sent.
Set enable to low
reset txpos
*/
__interrupt void sciaTxFifoIsr(void)
{
SciaRegs.SCIFFTX.bit.TXFFINTCLR=1; // Clear SCI Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ACK
asm(" NOP");
EINT;
static unsigned char Tx_pos = 0;
while((SciaRegs.SCIFFTX.bit.TXFFST < 4) && (Tx_pos < Tx_Frame_len))
{
SciaRegs.SCITXBUF = Tx_frame[Tx_pos++];
}
if((Tx_pos >= Tx_Frame_len) && (SciaRegs.SCICTL1.bit.TXENA == 1))// if((Tx_pos >= Tx_Frame_len) && (SciaRegs.SCICTL1.bit.TXENA == 1))
{
clear_Rx_frame();
//GpioDataRegs.GPACLEAR.bit.GPIO6 = 1;
SciaRegs.SCICTL1.bit.TXENA = 0; //Disable Transmission Interrupts.
Tx_pos = 0;
Tx_Frame_len = 0;
}
DINT;
/* SciaRegs.SCIFFTX.bit.TXFFINTCLR=1; // Clear SCI Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ACK*/
}
void scia_fifo_init()
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pull-up for GPIO7 (SCIRXDA)
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pull-up for GPIO12 (SCITXDA)
GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 3; // Asynch input GPIO7 (SCIRXDA)
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 2; // Configure GPIO7 for SCIRXDA operation
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 2; // Configure GPIO12 for SCITXDA operation
EDIS;
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0001; //0x0003 // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA =1;
SciaRegs.SCICTL2.bit.RXBKINTENA =1;
SciaRegs.SCIHBAUD = 0x0000;
SciaRegs.SCILBAUD = 0x00C2;//1250000//1;//625000//15;//--56000 //30;//--38265//61 //--19200;//C2;//--9600
SciaRegs.SCIFFTX.all = 0xC020;
SciaRegs.SCIFFRX.all = 0x0022;
SciaRegs.SCIFFCT.all = 0x0000;
SciaRegs.SCIPRI.all = 0x0010;
SciaRegs.SCICTL1.all =0x0021; //0x0023 // Relinquish SCI from Reset
SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
clear_Tx_frame();
clear_Tx_frame();
}
ramakrishna dutt said:I am getting error at the line: 141 ( msg = "AT+SAPBR=3,1,"Contype","GPRS" ";)
Yes, you cannot have multiple double inverted commas.Try:
msg = "AT+SAPBR=3,1,Contype,GPRS";
Btw is this a single command with CR only after "GPRS"?
Regards,
Gautam
sir, I am now getting no errors.
But I am still in confusing stage, how to get data and AT Commands simultaneously. Can u give any flow/idea..
Hi gautham,
my work come to an end stage.
But now the problem is:
According to the sim900 module, the syntax of the command shall be:
AT+SAPBR=3,1,"Contype","GPRS".
so, how to define this type of character string.
I am not getting idea.