TMS320F28235: About TDO pin state when TRST pin is Low

Keirs

Expert 2605 points

Part Number: TMS320F28235
Other Parts Discussed in Thread: TMS320C28346,

Hello.

I have two questions.

1.When the TRST pin state is low, is the TDO pin state Hi-Z ?

2.Is the TCK and the TMS signals ignored while the TRST pin is in low state?

This question is related to TMS320F28235 and TMS320C28346.

regards,

uchida-k

over 9 years ago

0 Peter Galicki over 9 years ago

TI__Expert 8105 points

Dear Uchida-k

I know that the TDO has an enable. This enable is only on when the data is being shifted out of TDO pin,

Therefore I assume that when TRSTn is active the TDO buffer is not driving.

But I am not sure if there is a pullup or pulldown on it – I am verifying this with our design team. I will let you know as soon as I get an answer.

Regards,

Peter

0 Keirs over 9 years ago in reply to Peter Galicki

Expert 2605 points

Hi Peter,

Thank you for your reply.

I'm waiting for your answer.

Regards,

uchida-k

0 Peter Galicki over 9 years ago in reply to Keirs

TI__Expert 8105 points

Uchida-K - san

I just confirm with out design team that the TDO pin is in high-Z state when TRSTN is asserted low. No pull-up or pull-down is present.

Regards,
Peter

0 Peter Galicki over 9 years ago in reply to Peter Galicki

TI__Expert 8105 points

Uchida-K - san

I just confirmed with our design team that the TDO pin is in high-Z state when TRSTN is asserted low. No pull-up or pull-down is present.

(My previous message had typos)

Regards,
Peter

0 Keirs over 9 years ago in reply to Peter Galicki

Expert 2605 points

Hi Peter,

I understand.
Thank you.

Regards,

uchida-k

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TMS320F28235: About TDO pin state when TRST pin is Low