Part Number: TMS320F28335
Tool/software: Code Composer Studio
I use TMS320F28335PTPS CA-3CAEPGW G4.
I have some problem with this item.
It worked good from test to delivery.
After my customer did test some times, It makes some unstable ADC result.
ADC result is moving about 20 at peak to peak when ustable.
ADC result is moving about 1 at peak to peak when normal.
Input is temperature sensor value.
This problem do not occur all times.
But very repetition at power on time after power off more than 20 minutes.
So I tested ADC input pin.
But input signal was always stable at ADC input pin.
I could find some information that is ADC inaccuracy at low frequencies from silicon errata(rev k).
But I set up that ADCCLK operate at 1.25MHz.
It is not same to errata.
So, I have some question.
1. Is it possible the ADC inaccuracy at low frequencies occur sometimes or by aging?
2. Is my problem same problem of ADC inaccuracy at low frequencies?
3. If yes, is it possible to solve this problem by rise of ADCCLK frequencies?
Because I already use more than 1Mhz.
4. I didn't see this problem at errata at design period.
When did you add ADC inaccuracy at low frequencies to errata?
5. Could you provide a errata when was just added ADC inaccuracy at low frequencies?
Following is my setting.
XCLKIN = 30MHz
HSPCP = 1
HSPCLK = 75 MHz
void Init_ADC(void)
{
AdcRegs.ADCREFSEL.bit.REF_SEL = 0U;
AdcRegs.ADCTRL3.all = 0x00E0U;
AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x03U;
AdcRegs.ADCTRL3.bit.ADCPWDN = 1U;
AdcRegs.ADCTRL3.bit.ADCCLKPS = 15U;
AdcRegs.ADCTRL1.bit.CPS = 1U; // ADCCLK = 1.25MHz
AdcRegs.ADCTRL1.bit.ACQ_PS = 15U;
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1U;
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1U;
AdcRegs.ADCTRL3.bit.SMODE_SEL = 0U;
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1U;
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x5U;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0U;
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 1U;
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 2U;
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 8U;
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 9U;
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 10U;
}