TMS320F28027: Flash pipeline prefetch start address : even or odd?

Shinji,

The F28027 flash pipeline fetches 64-bit fetch packets aligned to a 64-bit word boundary.  This means, for example, if you branched (or called) to address 0x3F0000, the flash pipeline will fetch the 64-bit packet at (16-bit word) addresses 0x3F0000 - 0x3F0003.  Similarly, if you branched to any of addresses 0x3F0001, 0x3F0002, or 0x3F0003, the flash pipeline will fetch the same 64-bit packet at addresses 0x3F0000 - 0x3F0003.

Shinji Ueda said:

If that address is even or odd, will Flash pipeline miss prefetch?

When making a mistake, how many words are offset by the maximum?

My customers have a issue that the control becomes unstable if the address of the function have 1 offset address.

This means,
1 offset : unstable
2 offsets: stable
3 offsets: unstable
4 offsets: stable...

I'm not sure what you mean about the pipeline missing prefetch, or being unstable.  There are no restrictions on where you can branch to (i.e., odd or even address).

Regards,

David

I've been asked by a user where this is documented.  See the F2802x System and Control User's Guide, SPRUFN3D, section 1.3.2:

Note that the flash pipeline is different than the CPU pipeline.  The flash pipeline feeds instructions into the fetch of the CPU pipeline.

Regards,

David