max time taken for the SPI to send/receive data and ADC to perform conversion (aka ADC EOC)

Baba,

There are timing diagrams in the datasheet for both SPI transactions and ADC conversions.  Are these sufficient?

-Tommy

Dear Tommy,

Thanks for the inputs. As per the above reference, we could not see maximum timings.
To be more clear, our requirement is to have the below information:

1. When driver puts data into SPI DATA register, what is the maximum time, controller has to wait to get an interrupt for the transmission.
2. Similarly, maximum time taken for ADC conversion is indicated by setting the ADC EOC flag to 0.
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In addition to above, One more doubt needs to be cleared.

To change the default SPI configuration. We need to follow below sequence as per reference manual:

1) Set the SPI SW RESET bit (SPICCR.7 on page 9-18) to 1.
2) Initialize the SPI configuration, format, baud rate, and pin functions as
desired.
3) Clear the SPI SW RESET bit.

Note: Proper SPI Initialization Using the SPI SW RESET Bit
To prevent unwanted and unforeseen events from occurring during, or as a
result of, initialization changes, set the SPI SW RESET bit (SPICCR.7 in
Figure 9–8 on page 9-18) before making initialization changes and then
clear this bit after the initialization is complete.

The code works correctly even with below sequence.
1) Set the SPI SW RESET bit to 1.
2) Clear the SPI SW RESET bit.
3) Initialize the SPI configuration, format, baud rate, and pin functions as
desired.

Could you please let me know the unwanted and unforeseen events as stated in the Note, occurs by violating the sequence.

Baba Tej Botcha said:

1. When driver puts data into SPI DATA register, what is the maximum time, controller has to wait to get an interrupt for the transmission.

Generally speaking, the SPI will begin transmitting immediately on the following SYSCLK cycle and the interrupt will be asserted once the character transmission is complete.

The actual amount of time required to transmit a character depends on your SPI configuration.  For example, the SYSCLK frequency, baud rate, and character size all contribute to how long it takes to complete a transaction.

Baba Tej Botcha said:

2. Similarly, maximum time taken for ADC conversion is indicated by setting the ADC EOC flag to 0.

The state machine timing behavior for ADC conversions is shown in the datasheet waveform.  The SOC to EOC duration is given in ADC clock and SYSCLK cycles so you need to factor in your clock periods.

Baba Tej Botcha said:

Could you please let me know the unwanted and unforeseen events as stated in the Note, occurs by violating the sequence.

I cannot comment on this undefined behavior.  There is no documentation to describe what might happen if the sequence is not followed.  I would advise that you follow the recommendation in the reference guide.

Baba,

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