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CCS/TMS320F28035: Digital Compare Event: DCAEVT1.synch delay

Tobias Ofenberger81
Intellectual 335 points
Part Number: TMS320F28035

Tool/software: Code Composer Studio

Hi Ti Community,

i have a question about the Digital Compare Submodule in the TMS32F28035.

The pink waveform in the attached screenshot is the EPwm1A signal, which is turned on throught the Trip Zone Submodule triggered by the TZ1 input.

The green waveform is turned of throught the Action Qualifier Submodule. So the DCAEVT1 sync the TBCTR to zero, and the CMPA register is zero so the EPWm2A output get low. 

But i have a fixed delay of about 65 ns. Is there any way to decrease this delay? I can't turn EPwm2A on by the TripZone Module because I need a dead band between this two signals. 


Best regards

Tobias Ofenberger

  • 0
    TI__Guru 62975 points

    Tobias,

    Can you confirm how you have the EPWMs configured?  

    I think you are doing the following:

    • Asynchronous trip signal is fed into TZ to force EPWM1A output high
    • The same asynchronous trip signal is qualified as DCAEVT1 in order to Sync / Clear EPWM2 TBCTR=0?
    • AQ is configured to force EPWM2A output low when TBCTR=0.

    We would need to know the exact settings that are being used because there are multiple paths that signals can take through the TZ and DC modules.  Some paths are synchronized with the EPWM clock (which will add digital delay) while others are asynchronous (subject only to propagation delay).

    Are these two signals always complementary?  If so, the DB module may be useful for maintaining the dead band.

    -Tommy