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TMS320F28377D: Technical reference manual ambiguity around CLA reading and writing of condition flags in MSTF

IainRist
Intellectual 711 points
Part Number: TMS320F28377D


I am trying to optimise some CLA code on the F28377D, using the Technical Reference Manual (spruhm8e) as a guide on the CLA instruction set and pipeline. I find where and when the condition flags in the MSTF register are read and updated to be ambiguous.

The TRM states that CLA conditional branches read the condition flags of the MSTF register in the D2 stage of the CLA pipeline ($5.5.1, p629), and that the last instruction that can modify the condition flags is 4 cycles previous (example 5-1, p631). Nowhere does the manual explicitly state in which pipeline stage modifications to the condition flags are made. Can you verify that for all instructions that modify the condition flags, the modification takes place in the EXE stage of the CLA pipeline?

There are several CLA instructions that are conditionally executed: "MMOV32 MRa, mem32 {, CNDF}", "MMOV32 MRa, MRb {, CNDF}", "MNEGF32 MRa, MRb {, CNDF}", "MSWAPF MRa, MRb {, CNDF}". The TRM does not state explicitly in which stage of the CLA pipeline the condition flags are read. Can you verify these instructions evaluate the condition flags in the D2 stage of the CLA pipeline?

"MNEGF32 MRa, MRb {, CNDF}" looks to update the condition flags regardless of the execution of the conditional negation, since if the condition is not true the instruction is essentially a "MMOV32 MRa, MRb". Is my understanding correct?

"MMOV32 MRa, mem32 {, CNDF}" and "MMOV32 MRa, MRb {, CNDF}" are conditionally executed instructions that modify the condition flags. Can you confirm that the condition flags are not updated if the condition is not true?

  • 0
    TI__Mastermind 20850 points

    IainRist said:
    Can you verify that for all instructions that modify the condition flags, the modification takes place in the EXE stage of the CLA pipeline?

    The flags reflect the results of arithmetic operations (mostly), which only complete in the EXE phase, so i'd assume the flags were also updated during this phase. Im not 100% sure if that is true of all CLA instructions so i will check with our design team and get back to you

    IainRist said:
    There are several CLA instructions that are conditionally executed: "MMOV32 MRa, mem32 {, CNDF}", "MMOV32 MRa, MRb {, CNDF}", "MNEGF32 MRa, MRb {, CNDF}", "MSWAPF MRa, MRb {, CNDF}". The TRM does not state explicitly in which stage of the CLA pipeline the condition flags are read. Can you verify these instructions evaluate the condition flags in the D2 stage of the CLA pipeline?

    The flags for these instructions seem to be evaluated during the EXE phase. Here is what i tried

    	MDEBUGSTOP
	MMOV16	MAR0, @_hnd
	MMOVF32	MR3, #121.0
	MMOVF32	MR2, #-190.0
	MSETFLG	NF=1
	MMOV32	MR0, MR3, LT	; MR0 should equal 121
	MMOV32	MR0, MR2, GEQ	; MR0 stays 121
	MSETFLG	NF=0 ZF=1
	MMOV32	MR0, MR2, EQ	; MR0 should equal -190
	MMOV32	MR0, MR3, NEQ	; MR0 stays -190
	MSETFLG	NF=0 ZF=0
	MNEGF32	MR1, MR3, NEQ	; MR1 should equal -121
	MNEGF32	MR1, MR3, EQ	; MR1 should equal +121 as cond is untrue
	MMOV32	MR1, MR2, NEQ	; MR1 should be -190, does not set NF even though cond is true
	MSETFLG	NF=0 ZF=1
	MMOV32	MR1, MR3, NEQ	; MR1 should stay -190, does not set NF even though cond is untrue
	MNOP
	MNOP
	MNOP
	MNOP
	MNOP
	MSTOP
	MNOP
	MNOP

    I change a flag and on the subsequent instruction perform a move dependent on that flag, and it works. This would indicate the flags for most instructions, unless explicitly stated in the case of the branch, are evaluated in the EXE phase. Again, ill confirm with our design team on this.

    IainRist said:
    "MNEGF32 MRa, MRb {, CNDF}" looks to update the condition flags regardless of the execution of the conditional negation, since if the condition is not true the instruction is essentially a "MMOV32 MRa, MRb". Is my understanding correct?

    Yes, correct

    IainRist said:
    "MMOV32 MRa, mem32 {, CNDF}" and "MMOV32 MRa, MRb {, CNDF}" are conditionally executed instructions that modify the condition flags. Can you confirm that the condition flags are not updated if the condition is not true?

    Correct. The condition flags are not updated if the condition is not true, they are only updated on unconditional moves.

  • 0 in reply to Vishal_Coelho
    TI__Mastermind 20850 points

    I checked with our design team and this was their response,

    Vishal_Coelho said:
    Can you verify that for all instructions that modify the condition flags, the modification takes place in the EXE stage of the CLA pipeline?

    design: "Any update to condition flags happen in the EXE phase"

    Vishal_Coelho said:
    There are several CLA instructions that are conditionally executed: "MMOV32 MRa, mem32 {, CNDF}", "MMOV32 MRa, MRb {, CNDF}", "MNEGF32 MRa, MRb {, CNDF}", "MSWAPF MRa, MRb {, CNDF}". The TRM does not state explicitly in which stage of the CLA pipeline the condition flags are read. Can you verify these instructions evaluate the condition flags in the D2 stage of the CLA pipeline?

    design: "All conditional instructions except branch/call/return evaluate flags in the EXE phase while branch/call/return evaluate them in the D2 phase"

    Vishal_Coelho said:
    MNEGF32 MRa, MRb {, CNDF}" looks to update the condition flags regardless of the execution of the conditional negation, since if the condition is not true the instruction is essentially a "MMOV32 MRa, MRb". Is my understanding correct?

    My response to this was incorrect. desgin: "Any conditional instruction, including this one, updates the condition flags only if COND = UNCF (unconditional move with flag modification). If the condition is not UNCF but evaluated to be true the negate operation takes place but flags are not updated"

    Vishal_Coelho said:
    MMOV32 MRa, mem32 {, CNDF}" and "MMOV32 MRa, MRb {, CNDF}" are conditionally executed instructions that modify the condition flags. Can you confirm that the condition flags are not updated if the condition is not true?

    design: "Any conditional instruction can change the flags only if COND= UNCF"

    branch/call/return evaluate the condition in D2 phase 

  • 0 in reply to Vishal_Coelho
    TI__Genius 12760 points
    Iain,

    does this answer your question? Can you proceed?

    Regards, Bernd