Other Parts Discussed in Thread: CC3200
Hello everyone,
I have a question regarding SPI on the TMDSDOCK28335. I am trying to send data to the TMDSDOCK28335 from the CC3200 using SPI. This is currently working fine. The problem is trying to integrate the SPI code with SCI/UART LabView code. We have working code for SPI, and we also have working code to display the read in values on LabView. But, like I said, when we try to combine these two pieces of code together, nothing displays on LabView and LabView will timeout after 10 seconds after not receiving any data. Here is the code so you can see what I have.
NOTE: I have not tried to add in any actual SPI code. The only thing I added was the SPI configuration call function (InitSpiaGpio()) and the two function calls (spi_init() and spi_fifo_init()) that set up the SPI registers. So, something is telling me that the SPI register configuration is somehow interfering with the LabView code already on the TMDSDOCK28335.
Thanks for your help,
Dalen M.
#include "stdio.h"
#include "string.h"
#include "DSP28x_Project.h"
#if (CPU_FRQ_150MHZ)
#define ADC_MODCLK 0x3
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2
#endif
#define ADC_CLKPS 0x0
#define ADC_SHCLK 0x0
#define BUFSIZE 256
//---PROTOTYPES------------------------------
void scia_echoback_init(void);
void scia_fifo_init(void);
void scia_xmit(int a);
void scia_msg(char *msg);
__interrupt void rxinta_isr(void);
__interrupt void adc_isr(void);
void spi_fifo_init(void);
void spi_init(void);
//---GLOBAL VARIABLES------------------------------
//--SCIA Variables--------------------
char msg[128];
char rxbuf[BUFSIZE];
Uint16 bufi = 0;
int slen;
int debug;
//char* testBuffer;
//ADC GlobaL
Uint16 output_voltage;
float test_analog_voltage;
unsigned int int1 = 16;
unsigned int int2 = 2568;
unsigned int int3 = 52258;
unsigned int int4 = 32000;
//char totalBuff[128];
char test1[8];
char test2[8];
char test3[8];
char test4[8];
//---MAIN PROGRAM------------------------------
int main(void) {
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
EALLOW;
SysCtrlRegs.HISPCP.all = ADC_MODCLK;
EDIS;
// Step 2. Initialize all relevant GPIO pins
InitSciaGpio();
InitSpiaGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
InitPieVectTable();
spi_fifo_init(); // Initialize the Spi FIFO
spi_init(); // init SPI
EALLOW; // This is needed to write to EALLOW protected register
PieVectTable.SCIRXINTA = &rxinta_isr;
PieVectTable.ADCINT = &adc_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
scia_echoback_init(); // Initialize SCI for echoback
scia_fifo_init(); // Initialize the SCI FIFO
InitAdc();
// Step 5. User specific code, enable interrupts:
memset(rxbuf, 0xFF, BUFSIZE); //Clear all nulls from buffer to facilitate string checking
memset(rxbuf + BUFSIZE -1, '\0', 1); //Tack a null on the end to facilitate use of strlen
// Enable CPU INT9 which is connected to SCIA INT:
PieCtrlRegs.PIEIER9.all = 0x0001; // Enable all SCIA RXINT interrupt
IER |= 0x0100; // enable PIEIER9, and INT9
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Enable ADCINT in PIE
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//Configuring the ADC
// AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CLKPS;
// AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;
AdcRegs.ADCMAXCONV.all = 0x0001; //Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; //Setup ADCINA3 as 1st SEQ1 conv
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; //Setup ADCINA2 as 2nd SEQ1 conv
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1; //Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; //Enable SEQ1 intterupt (every EOS)
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.half.CMPA = 0x0080;
// EPwm1Regs.CMPA.half.CMPA = 0x00; // Set compare A value
EPwm1Regs.TBPRD = 1499; // Set period for ePWM1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
for(;;)
{
sprintf(msg, "%08u", int1);
sprintf(test2, "%08u", int2);
sprintf(test3, "%08u", int3);
sprintf(test4, "%08u", int4);
strcat(msg, test2);
strcat(msg, test3);
strcat(msg, test4);
slen = strlen(rxbuf);
if(slen < BUFSIZE - 1)
{
if (strcmp("DATA", rxbuf) == 0)
{
scia_msg(msg);
debug = debug +1;
}
else{
scia_msg("NOoo");
}
memset(rxbuf, 0xff, BUFSIZE - 1);
bufi = 0;
}
DELAY_US(100);
}
}
void scia_echoback_init()
{
// Note: Clocks were turned on to the SCIA peripheral
// in the InitSysCtrl() function
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.all =0x0003;
SciaRegs.SCICTL2.bit.TXINTENA =1; //Already in above statement
//SciaRegs.SCICTL2.bit.RXBKINTENA =1;
#if (CPU_FRQ_150MHZ)
SciaRegs.SCIHBAUD =0x0000; // 173611 baud @LSPCLK = 37.5MHz?
SciaRegs.SCILBAUD =0x0028; //
#endif
#if (CPU_FRQ_100MHZ)
SciaRegs.SCIHBAUD =0x0000; // 9600 baud @LSPCLK = 20MHz.
SciaRegs.SCILBAUD =0x001A;
#endif
SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
// Transmit a character from the SCI
void scia_xmit(int a)
{
while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
SciaRegs.SCITXBUF=a;
}
void scia_msg(char * msg)
{
int i;
i = 0;
while(msg[i] != '\0')
{
scia_xmit(msg[i]);
i++;
}
}
// Initialize the SCI FIFO
void scia_fifo_init()
{
SciaRegs.SCIFFTX.all=0xE040;
SciaRegs.SCIFFRX.all=0x2061;
SciaRegs.SCIFFCT.all=0x0;
}
//This interrupt offloads received characters from the hardware buffer into the software buffer rxbuf which is allocated in the main file
__interrupt void rxinta_isr()
{
if (SciaRegs.SCIFFRX.bit.RXFFOVF)
{
scia_msg("FIFO_OVERFLOW!");
}
while(SciaRegs.SCIFFRX.bit.RXFFST != 0){
if (bufi < BUFSIZE){
rxbuf[bufi++] = SciaRegs.SCIRXBUF.all;
}
else{
bufi = 0;
}
SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1; // clear Receive interrupt flag
PieCtrlRegs.PIEACK.all = PIEACK_GROUP9; // Acknowledge the interrupt
}
}
__interrupt void adc_isr(void){
output_voltage = AdcRegs.ADCRESULT0 >> 4; //adc3
test_analog_voltage = (output_voltage*3.3/4096);
//reinit begins
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; //reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; //Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge intterupy to PIE
// END reinitialization
}
void spi_init(){
//SPICCR is a 8 bit register
//Bit 7 (Software Reset): Set to 0, must be cleared before configuration
//Bit 6 (Clock Polarity): Set to 0, data outputted on rising edge and data incoming is falling edge
//Bit 5 (Reserved): No writing allowed
//Bit 4 (SPI Loopback): Set to 0 to disable, only for internal test only
//Bit 3-0 (Character length bits): Set to 0b1111 for 16 bit character (CC3200 is sending two character totaling 16 bits)
SpiaRegs.SPICCR.all =0x000F;
//SPICTL is a 8 bit register
//Bit 7-5 (Reserved): No writing allowed
//Bit 4 (Overrun Interrupt Enable): Set to 0 for the time being, just trying to do a simple SPI connection
//Bit 3 (Clock Phase): Set to 0, normal SPI clocking scheme (without being delayed one-half cycle)
//Bit 2 (Master/Slave bit): Set to 0 to be the slave
//Bit 1 (Talk bit): Set to 1, trying to send data back
//Bit 0 (SPI Interrupt Enable): Set to 0, not worried about interrupts right now
SpiaRegs.SPICTL.all =0x0002;
//This register does not matter since clock is coming from CC3200-LAUNCHXL
SpiaRegs.SPIBRR =0x007F;
//SPICCR is a 8 bit register
//Bit 7 (Software Reset): Set to 1, must be set when ready for data transmission
//Bit 6 (Clock Polarity): Set to 0, data outputted on rising edge and data incoming is falling edge
//Bit 5 (Reserved): No writing allowed
//Bit 4 (SPI Loopback): Set to 0 to disable, only for internal test only
//Bit 3-0 (Character length bits): Set to 0b1111 for 16 bit character (CC3200 is sending two character totaling 16 bits)
SpiaRegs.SPICCR.all =0x008F;
//Set so breakpoints don't disturb transmission
SpiaRegs.SPIPRI.bit.FREE = 1;
}
void spi_fifo_init(){
//Initialize SPI FIFO registers (Not really sure what these do, just left them by default)
SpiaRegs.SPIFFTX.all=0xE040;
SpiaRegs.SPIFFRX.all=0x204f;
SpiaRegs.SPIFFCT.all=0x0;
}
