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TMS320F28377D: End if message detection

Zubair Hameed
Prodigy 170 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Hello

I am writing an interrupt driven SCI driver to communicate between 2 micro controllers.  It is not clear from the technical manual how can I detect the end of block?  

I am using SCI in standard mode with FIFO enabled.  Per the technical manual, the receive FIFO interrupt RXINT is common interrupt for SCI FIFO receive, receive error, and receive FIFO overflow.  How do I use these interrupts to detect end of message?  For example, if the block (or message) length is say 20 bytes.  On receiving, I will get RXINT when FIFO is full.  I will move these bytes to my local buffer and then wait for remaining block.  Now, there are only 4 bytes left.  Will the receive FIFO generate RXINT interrupt when 4 bytes are received and then line is Idle?  If yes, then is there any flag to indicate that this interrupt was caused due to Idle time?

I also checked Idle line mode in multiprocessor communication.  But that only detects start of a block after Idle line and not end of a block due to line being Idle for longer than 10-bits.  In section 19.8.1 Step 4:  " If the CPU is being addressed, the service routine clears the SLEEP bit and receives the rest of the data block."  --- How does it detect end of block via interrupt?  (I want line to be Idle as indication of end of block)

Thank you very much for your help.

Zubair Hameed

  • 0
    TI__Mastermind 32995 points
    Hi Zubair,

    You will need to develop a protocol to specify from the host to device, how many bytes are being transferred in a payload. I am not aware of the SCI being able too indicate when the line is idle.

    You can configure the SCI to generate an RX interrupt at different FIFO levels using the RXFFIL bit field. If the SCI received data when the FIFO is full, the data will be lost. Therefore, the data should be read from the RXBUF before it is full.

    Please see the SCI examples in C2000Ware software package.

    sal
  • 0 in reply to Sal Pezzino
    Prodigy 170 points

    Thanks Sal for the reply.  I am trying to implement Modbus protocol which defines end of message as Idle time equal to 2 character lengths.  I have implemented this on Renesas controller in the past which had an interrupt available which could be programmed for Idle time after Start bit.

    The Modbus protocol does define number of bytes in a message but detecting that requires parsing the incoming data before complete message is received and then keeping count when the complete message has been received.  The Idle line detection makes low level driver simple and decoupled from the message parsing.

    If TI does not have this capability (and it seems like it does not), I am thinking of using a timer to detect the Idle time on every FIFO interrupt.

    Thanks again for your response.

    Zubair

  • 0 in reply to Zubair Hameed
    TI__Mastermind 32995 points
    Hi Zubair,

    I understand. We do not have an beginning of idle time interrupt. Using a CPUTimer would be the way to go.

    Thanks,
    sal