Compiler/TMS320F2812: External interrupt pin works when I set H/W breakpoint from the start of the debug but does not work if I don't set breakpoints

Tool/software: TI C/C++ Compiler

Hi, 

I am running EtherCAT slave code on my TI DSP and at the moment this is related to distributed clocks in EtherCAT. I have a piggyback ET1100 ethercat board which is connected to my TI DSP via SPI pins. As soon as my master (PC) sends a DC clock signal, the ET1100 converts it into a pulse (SYNC pulse) and sends that to my TI DSP via my external interrupt (XINT1 which is configured). 

When I set breakpoints at the start of debugging I see that the code hits the XINT1 ISR but when I don't set breakpoints at the start of the debug (I set them at a later stage to just make sure the ISR is hit) then the ISR is never reached (hit). I am not sure of this strange behavior. Also I am using BIOS.tcf to configure the ISRs. 

Attaching below the code of the interrupt initialization and ISR.

/*---------------------------------------------------------------------------------------------------------------------
; Initialize the processor
;----------------------------------------------------------------------------------------------------------------------
*/
void CPU_init(void)
{
    InitSysCtrl();                                                             // Initialize the CPU (FILE: SysCtrl.c)

    // Initialize PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    InitPieCtrl();

    // the fast_code_ram load start and load end can be equal because the 
    // FAST_CODE_MEM section can be mapped to flash
    memcpy(&LNK_fast_code_ram_run_start,
           &LNK_fast_code_ram_load_start, &LNK_fast_code_ram_load_end - &LNK_fast_code_ram_load_start);
    memcpy(&LNK_secure_code_ram_run_start,
           &LNK_secure_code_ram_load_start, &LNK_secure_code_ram_load_end - &LNK_secure_code_ram_load_start);

#   if(!CFG_HW_MATCH_GMxxx)
    // LED, move to LED.h ?????
    // XF , P4.17
    EALLOW;                                                                    // Enable protected register access
    GpioMuxRegs.GPFMUX.bit.XF_GPIOF14 = 0;                                     // XF pin disabled (LED on eZdsp)
    GpioMuxRegs.GPFDIR.bit.GPIOF14 = 1;                                        // 1: GPIOF14 is output 
    GpioDataRegs.GPFDAT.bit.GPIOF14 = 0;                                       // 0: clear GPIOF14 (turn LED off)
    EDIS;
#   endif

    // Initalize XINTF Zone 6 and Zone 7 timing
    // Refer to the CodeRunFromXintfonF2812EzDSP.cmd file.
    xintf_zone6and7_timing();

    // Initialize the FLASH
    InitFlash();

#ifdef ETHERCAT_CODE
    external_int_initialise();
#endif


}


#ifdef ETHERCAT_CODE /*EtherCAT code start*/
/*EtherCAT specific function*/

void external_int_initialise(void)
{
EALLOW;	// This is needed to write to EALLOW protected registers
PieVectTable.XINT1 = &xint1_isr;
//    PieVectTable.XINT2 = &xint2_isr;
EDIS;   // This is needed to disable write to EALLOW protected registers


// Enable XINT1 and XINT2 in the PIE: Group 1 interrupt 4 & 5
// Enable INT1 which is connected to WAKEINT:
PieCtrlRegs.PIECRTL.bit.ENPIE = 1;          // Enable the PIE block
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;          // Enable PIE Group 1 INT4
//    PieCtrlRegs.PIEIER1.bit.INTx5 = 1;          // Enable PIE Group 1 INT5
IER |= 0x0001;                              // Enable CPU INT1
EINT;

// Configure XINT1
   XIntruptRegs.XINT1CR.bit.POLARITY = 0;      // Falling edge interrupt
//       XIntruptRegs.XINT2CR.bit.POLARITY = 1;      // Rising edge interrupt

// Enable XINT1 and XINT2
   XIntruptRegs.XINT1CR.bit.ENABLE = 1;        // Enable XINT1
//       XIntruptRegs.XINT2CR.bit.ENABLE = 1;        // Enable XINT2

}

interrupt void xint1_isr(void)
{
//	EtherCAT_task();
	//AX_EtherCAT_JETBAR_update_4kHz(AX_JETBAR * self);

	// Acknowledge this interrupt to get more from group 1
		PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

#endif    /*EtherCAT code end*/