Hi C2000 champion
I see the datasheet show for ADC VREFHI place 1uf capacitor for 12 bit mode, and should place 22uf for 16 bit mode, is it correct? as the controlcard only place 2.2uf.
Meanwhile, the datasheet also said that all the VDD decouple cap should at least 20uf, but the controlcard also didn't meet this.
please help to comment.
Hi Eric,
In the F28379D ControlCard, we have placed 22uF capacitors and this should support 16-bit operation. Other kits like the F2837xS launchpad have smaller capacitors and support 12-bit mode (although 16-bit performance will still probably be good).
As far as the decoupling capacitance, the guidelines are "1.2-V digital logic power pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 uF. The exact value of the decoupling capacitance should be determined by your system voltage regulation solution."
So this isn't a hard requirement.
On the ControlCard there are 7 x 0.1uF + 2 x 10uF. The 10uF behind the inductive bead won't function to filter high frequency transients, so there is ~10.7uF of decoupling capacitance.
Practically, it is more important that you use high quality capacitors, place at least one capacitor really close to each pin, and physically distribute the remaining capacitors in a reasonable way depending on the specifics of your board component placement and power distribution routing.
