TMS320F28035: CLA RAM assigments

Hi Alberto,

Any of the CLA examples in C2000Ware will help.

The configuration you posted looks correct.

What do you mean the "RAM areas are changing values in non expected way"? Are the configuration bits changing? Are the RAM contents changing in system? Are the RAM contents not being programmed correctly?

Regards,
sal

Sal,

they are making progresses, but still not fully working.
When CLA is used, RAM is organized as following:

RAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM (L0)*/
RAML3 : origin = 0x009000, length = 0x001000 /* data RAM (L3) */
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
CLARAM0 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 */
CLARAM1 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 */
CLA_CPU_MSGRAM : origin = 0x001480, length = 0x000080 /* CLA-R/W, CPU-R message RAM */
CPU_CLA_MSGRAM : origin = 0x001500, length = 0x000080 /* CPU-R/W, CLA-R message RAM */



ramfuncs : LOAD = FLASHD,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0

Cla1Prog : LOAD = FLASHC, /* Note for running from RAM the load and RUN can be the same */
RUN = RAML3,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
PAGE = 0

/* Allocate uninitalized data sections: */
.stack : > RAMM0, PAGE = 1
.ebss : > RAMM1, PAGE = 1
.esysmem : > RAMM1, PAGE = 1

Cla1ToCpuMsgRAM : > CLA_CPU_MSGRAM PAGE = 1
CpuToCla1MsgRAM : > CPU_CLA_MSGRAM PAGE = 1

ClaDataRam0 : > CLARAM0, PAGE = 1
ClaDataRam1 : > CLARAM1, PAGE = 1
CLAmathTables : > CLARAM1, PAGE = 1
CLA1mathTables : > CLARAM1, PAGE = 1

//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > CLARAM0, PAGE = 1


They need to have more RAM for User Program. Can they modify or move RAM areas RAML3,CLARAM0,CLARAM1,CLA_CPU_MSGRAM,CPU_CLA_MSGRAM ?

thanks,
Alberto

Sal,

customer is ok in using L3 as Program memory for CLA.
They also ask if they can use L3 memory non assigned to CLA program memory as standard "CPU Data Memory".
Is this feasible?

thanks
Alberto

This should be feasible. The C28x just needs to reassign or reconfigure the master.

sal

Sal,

thanks for your feedback.
Can you kindly provide me example on how to reassign this memory?

Thanks,
Alberto

-Cla1Regs.MMEMCFG.bit.PROGE = 0;
-Cla1Regs.MMEMCFG.bit.RAM0E = 0;
-Cla1Regs.MMEMCFG.bit.RAM1E = 0;

Writing 0 to these bits in Memcfg register will assign the memories back to the C28x.

sal