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CCS/TMS320F28335: Setting a timer ISR

Part Number: TMS320F28335

Tool/software: Code Composer Studio

Hello,

I am working on a full bridge inverter. I have had success with 4 pwm signals at 20 kHz using the sine table to achieve an open loop output. It uses an EPWM ISR to update the duty cycle from the sine table. I am currently working on a closed loop solution. I am trying to calculate the RMS value of the output 60 Hz waveform using the ADC. When I try to set timer1 for 16.67 mS (60Hz) my EPWM ISR is ignored. I am having trouble running both ISRs at once. Here is some pieces of my code (main and timer ISR) to see if anyone can spot the problem:

void main(void)

{

InitSysCtrl(); //Basic Core Init from DSP2833x_SysCtrl.c

EALLOW;

SysCtrlRegs.WDCR= 0x00AF; //Re-enable the watchdog

EDIS; //0x00AF to NOT disable the Watchdog, Prescaler = 64

DINT; //Disable all interrupts

Gpio_select();

Setup_ePWM(); //init of ePWM1A

InitPieCtrl(); //basic setup of PIE table; from DSP2833x_PieCtrl.c

InitPieVectTable(); //default ISR's in PIE

InitAdc();

EALLOW;

PieVectTable.TINT0 = &cpu_timer0_isr;

EDIS;

InitCpuTimers(); // basic setup CPU Timer0, 1 and 2

ConfigCpuTimer(&CpuTimer0,150,833);

CpuTimer0Regs.TCR.bit.TSS = 0;

EALLOW;

PieVectTable.EPWM1_INT = &ePWM_compare_isr;

EDIS;

 

PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

PieCtrlRegs.PIEIER3.bit.INTx1 = 1;

IER |= 1; \

IER |= M_INT1;

EINT;

ERTM;

 

// Configure ADC

AdcRegs.ADCMAXCONV.all = 0; // Setup 1 conv's on SEQ1

AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.

AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1

AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)

value = 1;

while(1)

{

while(CpuTimer0.InterruptCount == 0)

CpuTimer0.InterruptCount = 0;

EALLOW;

SysCtrlRegs.WDKEY = 0x55; //service WD #1

EDIS;

}

}

interrupt void cpu_timer0_isr(void)

{

CpuTimer0.InterruptCount++;

value ++;

EALLOW;

SysCtrlRegs.WDKEY = 0xAA; // service WD #2

EDIS;

PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

}

Thanks for any help,

Joe    

  • Joseph,

    my immediate thought is you're clearing one interrupts X's flag in interrupt Y, or vice-versa.

    1. Comment out the Timer ISR initialization and make sure that the problem goes away.

    2. Add the Timer ISR back, observe the Interrupt flags behavior as you step through the interrupts.

    Nested interrupts should be disabled by default, so one interrupt can delay another, but setup correctly nothing should be missed. One caveat to this is if interrupt X is very long, interrupt Y may trip many times before it's serviced.


    Regards,
    Cody