CCS/TMS320F28377S: TMS320F28377S

Tool/software: Code Composer Studio

Hi, when i run the code below the second interrupt routine is being ignored. If i set up a break point, restart the program and do stepping, the second ISR is working and the first does not. What do I do wrong?

thanks vadim

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//! EPWM2A/B(PA2_GPIO2 pin80 & PA3_GPIO3 pin79)

// Included Files
//
#include "F28x_Project.h"
#include "math.h"
#define FREQUENCY 20// TBPRD = fcpu / (2* fpwm * CLKDIV * HSPCLKDIV)
// TBPRD = 200 MHz / (2 * 500 kHz * 1 * 1)= 200
#define DELAY 500000
#define REFERENCE 1
#define CPUFREQ_MHZ 200
#define DAC_NUM 1
//
Uint16 k = 0;
Uint32 n = 0;
Uint16 sine_table[FREQUENCY];
Uint32 samplingFreq_hz = 1500000;
Uint32 MAX = 2048;
Uint32 length = 127;
Uint16 buff[128];
Uint16 sgen_out = 0;
Uint16 ndx = 0;
float cpuPeriod_us = 0;
float samplingPeriod_us = 0;

void configureDAC(Uint16 dac_num);
interrupt void epwm2_isr(void);
interrupt void cpu_timer0_isr(void);
//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks

//
InitSysCtrl();

//
// Step 2. Initialize GPIO:
// illustrates how to set the GPIO to it's default state.
//
// InitGpio();

// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
// These functions are in the F2837xS_EPwm.c file
//

InitEPwm2Gpio();

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;

//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xS_PieCtrl.c file.
//
InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xS_DefaultIsr.c.
// This function is found in F2837xS_PieVect.c.
//
InitPieVectTable();

//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM2_INT = &epwm2_isr;
// Map Cpu Timer0 interrupt function to the PIE vector table
PieVectTable.TIMER0_INT = &cpu_timer0_isr;
EDIS; // This is needed to disable write to EALLOW protected registers

//
// For this example, only initialize the ePWM
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;

for(k=0; k<FREQUENCY; k++)
{
sine_table[k]=roundf(.5*(FREQUENCY)*(1+sinf(6.28/(FREQUENCY)*k)));
//sine_t[k]=.5*FREQUENCY*(1+sinf(6.28/FREQUENCY*k));

}
k = 0;

//
// Setup TBCLK
//
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm2Regs.TBPRD = FREQUENCY; // Set timer period 500 kHz PWM frequency
// TBPRD = fcpu / (2* fpwm * CLKDIV * HSPCLKDIV)
// TBPRD = 200 MHz / (2 * 500 kHz * 1 * 1)= 200
//
// Set Compare values
//
EPwm2Regs.CMPA.bit.CMPA = FREQUENCY/2; // Set compare A value for duty cycle 50% 200/2
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000; // Clear counter
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = 0;

//
// Setup shadow register load on ZERO
//
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

//
// Set actions
//
EPwm2Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM2A on Period
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on event A,
// up count

//
// Interrupt where we will change the Compare Values
//
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm2Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event

EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;

//
// Step 4. User specific code, enable interrupts:

IER |= M_INT3;// Enable CPU INT3 which is connected to EPWM1-3 INT:
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;// ePWM2
IER |= M_INT1;// Enable CPU INT1 which is connected TIMER0:
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;// TIMER0
//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

//DAC portion

//
// Initialize variables
//
cpuPeriod_us = (1.0/CPUFREQ_MHZ);
samplingPeriod_us = (1000000.0/samplingFreq_hz);

//
// Configure DAC DACOUTA/ADCINA1 pin27 ext ref pin28 3_3V
//
configureDAC(DAC_NUM);

//Calculate buffer
for(ndx=0; ndx<length+1; ndx++)
{
buff[ndx]=(round(MAX+(MAX-1)*sin(6.28*ndx/length)));
// buff[ndx]=(1*sin(6.28*ndx/length));
}
ndx = 0;

// Initialize Cpu Timers
//
InitCpuTimers();

//
// Configure Cpu Timer0 to interrupt at specified sampling frequency
//
ConfigCpuTimer(&CpuTimer0, CPUFREQ_MHZ, samplingPeriod_us);

//
// Start Cpu Timer0
//
CpuTimer0Regs.TCR.all = 0x4000;

//
// Step 5. IDLE loop. Just sit and loop forever (optional):
//
for(;;)
{
asm (" NOP");
}
}

//
// configureDAC - Enable and configure the requested DAC module
//
void configureDAC(Uint16 dac_num)
{
EALLOW;

DacaRegs.DACCTL.bit.DACREFSEL = REFERENCE;
DacaRegs.DACOUTEN.bit.DACOUTEN = 1;
DacaRegs.DACVALS.all = 0;

DELAY_US(10); // Delay for buffered DAC to power up

EDIS;
}

//
// epwm2_isr - EPWM2 ISR to update compare values
//
interrupt void epwm2_isr(void)
{

//
// Update the CMPA
//
if (k++ == FREQUENCY-1) k = 0;
for (n = 0; n < DELAY; n++)
{
EPwm2Regs.CMPA.bit.CMPA = sine_table[k];

//
// Clear INT flag for this timer
//
EPwm2Regs.ETCLR.bit.INT = 1;

//
// Acknowledge this interrupt to receive more interrupts from group 3
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}

}

//
// cpu_timer0_isr - Timer ISR that writes the sine value to DAC
//
interrupt void cpu_timer0_isr(void)
{
//
// Write current sine value to buffered DAC
//
//sgen.calc(&sgen);
ndx++;

sgen_out = buff[ndx];
DacaRegs.DACVALS.all = sgen_out;
ndx = ndx % length;
//
// Acknowledge this interrupt to receive more interrupts from group 1
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

}

//
// End of file
//