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TMS320F28377S: uPP Throughput for Real Time Control

Part Number: TMS320F28377S

Hi all,

I am looking to use the TMS320F28377S to implement an average current mode control law inner loop and modulator for an interleaved buck converter. The plan is to use an external FPGA to handle the outer loops. The design requires multiple 16-bit signals to be passed at a 1MSPS rate.  The uPP peripheral would seem to be up to the task, but the 64 byte read quantization in the uPP DMA makes this impossible. At best it is possible to shift 781250 data frames per second. This effectively limits the data rate; is there anyway to get around the 64 byte limitation of the DMA, or should I look at a different data interface such as the McBSP?

Best regards,

Lance Hummel

  • Hi Lance,

    Have you looked at SPI interface for this? On this device SPI can operate upto 50MHz and if that meets the performance you are looking for then I would suggest to use that instead of uPP. uPP on this device was implemented for a specific application and it may not be available on future C2000 devices.

    Let me know.

    Regards,

    Vivek Singh
  • Hi Vivek,

    I am doing the coding for this particular design so I will suggest switching to using the SPI peripherals in high speed mode. I have some concerns about latency in the control loop using a serial bus at 50MHz versus an 8 bit parallel bus at 50MHz, but reducing the loop bandwidth is always an option if it becomes a problem. Just to make sure I am clear, all three SPIA, SPIB, and *** peripherals can be used in high speed mode assuming you use the dedicated high speed SPI GPIO pins?

    Regards,

    Lance
  • Hi Lance,

    Just to make sure I am clear, all three SPIA, SPIB, and *** peripherals can be used in high speed mode assuming you use the dedicated high speed SPI GPIO pins?

    This is correct.

    Regards,

    Vivek Singh