Part Number: TMS320F28027
Tool/software: Code Composer Studio
Hello~
I am new with TI MCU.
Currnetly I am working on small project with TI MCU.
For my project, I need 3 external interrupts.
So, I assigned 3 GPIOs (GPIO3, GPIO4, and GPIO5) for XINT1, XINT2 and XINT3
My configuration is:
- Hardware: LAUNCHXL-28027
- Frequency: 60MHz
- 3 gpios for external interrupts: XINT1 (GPIO3), XINT2 (GPIO5), XINT3 (GPIO4)
Of these, XINT1 and XINT2 are working, but XINT3 is never happen.
What's going on and how can I fix it?
Let me know please.
Thnka you in advance.
- Jae -
My code is below:
====
EALLOW;
PieVectTable.XINT1 = &xint1_isr;
PieVectTable.XINT2 = &xint2_isr;
PieVectTable.XINT3 = &xint3_isr;
EDIS;
// Enable XINT1, XINT2 and XINT3 in the PIE: Group 1 interrupt 4, 5 and Group 12 interrupt 1
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER1.bit.INTx4 = 1; // Enable PIE Group 1 INT4 --> XINT1
PieCtrlRegs.PIEIER1.bit.INTx5 = 1; // Enable PIE Group 1 INT5 --> XINT2
PieCtrlRegs.PIEIER12.bit.INTx1 = 1; // Enable PIE Group 12 INT1 --> XINT3
IER |= M_INT1 | M_INT12; // Enable CPU Interrupt 1 & 12
EINT; // Enable Global interrupt INTM
ERTM;
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 0; // GPIO3 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO3 = 0; // input
GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 1; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling perios = 510 x Tsysclkout = 510 x 16.67us = 85us
EDIS;
// GPIO3 is XINT1
EALLOW;
GpioIntRegs.GPIOXINT1SEL.all = 3; // XINT1 is GPIO3
EDIS;
// Set GPIO4
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0; // GPIO4 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO4 = 0; // input
GpioCtrlRegs.GPAQSEL1.bit.GPIO4 = 1; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling perios = 510 x Tsysclkout = 510 x 16.67us = 85us
EDIS;
// GPIO4 is XINT3
EALLOW;
GpioIntRegs.GPIOXINT3SEL.all = 4; // XINT3 is GPIO4
EDIS;
// Set GPIO5
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 0; // GPIO5 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO5 = 0; // input
GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 1; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling perios = 510 x Tsysclkout = 510 x 16.67us = 85us
EDIS;
// GPIO5 is XINT2
EALLOW;
GpioIntRegs.GPIOXINT2SEL.all = 5; // XINT2 is GPIO5
EDIS;
// Configure XINT1
XIntruptRegs.XINT1CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT1CR.bit.ENABLE = 1; // Enable XINT1
// Configure XINT2
XIntruptRegs.XINT2CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT2CR.bit.ENABLE = 1; // Enable XINT2
// Configure XINT3
XIntruptRegs.XINT3CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT3CR.bit.ENABLE = 1; // Enable XINT3
==
