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Wrong output from ControlLaw_2P2Z module if Ref & ADC (Fdbk) is ‘0’

Leo Bosch
Guru 23000 points

In the ‘DC/DC LED Developer's Kit’ setting a LED output to a certain value and go back to zero, the ControlLaw_2P2Z .macro outputs a high value (and also a high pulse to the LED) if the ADC result is ‘0’.

 

I solved the problem to check for Null, but if this is the best solution…?

 

;====================================

ControlLaw_2P2Z         .macro n

;====================================

 

; Set up address pointers:

      MOVW  DP, #_CNTL_2P2Z_Ref:n:

      MOVL XAR0, @_CNTL_2P2Z_Ref:n:     ; Net pointer to Ref (XAR0)

      MOVL XAR1, @_CNTL_2P2Z_Fdbk:n:    ; Net pointer to Fdbk(XAR1)

      MOVL XAR2, @_CNTL_2P2Z_Out:n:     ; Net pointer to Out (XAR2)

      MOVL    XAR3, @_CNTL_2P2Z_Coef:n:  ; Net pointer to Coefficients (XAR3)

           

; Calculate input (Ref - Fdbk):

      MOV         ACC, *XAR0<<11                     ; ACC = Ref            (Q15 to Q26)

      SUB         ACC, *XAR1<<11                     ; ACC = Ref - Fdbk      (Q15 to Q26)

      MOVW  DP,   #CNTL_2P2Z_DBUFF:n:    

      MOVL  @CNTL_2P2Z_DBUFF:n:+4, ACC   ; e(n) = ACC = error (Q26)

; If Null then exit:

      BF          CL_2P2Z:n:a, NEQ             ; Not '0'

      MOV         ACC, *XAR0

      BF          CL_2P2Z:n:exit, EQ                 ; All '0'

CL_2P2Z:n:a:           

      ;

; Calculate 2p-2z filter:    Note: IIR engine is Q independent

      MOVL  XT, @CNTL_2P2Z_DBUFF:n:+8    ; XT  = e(n-2)

      QMPYL P, XT, *XAR3++                     ; P   = e(n-2)*B2

      MOVB  ACC, #0                                  ; ACC = 0

      MOVDL XT, @CNTL_2P2Z_DBUFF:n:+6    ; XT  = e(n-1), e(n-2) = e(n-1)

      QMPYAL      P, XT, *XAR3++                     ; P   = e(n-1)*B1, ACC=e(n-2)*B2

      MOVDL XT, @CNTL_2P2Z_DBUFF:n:+4    ; XT  = e(n), e(n-1) = e(n)

      QMPYAL      P, XT, *XAR3++                     ; P   = e(n)*B0, ACC = e(n-2)*B2 + e(n-1)*B1

      MOVL  XT, @CNTL_2P2Z_DBUFF:n:+2    ; XT  = u(n-2)

      QMPYAL      P, XT, *XAR3++                     ; P   = u(n-2)*A2, ACC = e(n-2)*B2 + e(n-1)*B1 + e(n)*B0

      MOVDL XT, @CNTL_2P2Z_DBUFF:n:+0    ; XT  = u(n-1), u(n-2) = u(n-1)

      QMPYAL      P, XT, *XAR3++                     ; P   = u(n-1)*A1, ACC = e(n-2)*B2 + e(n-1)*B1 + e(n)*B0 + u(n-2)*A2

      ADDL  ACC, @P                                  ; ACC = e(n-2)*B2 + e(n-1)*B1 + e(n)*B0 + u(n-2)*A2 + u(n-1)*A1

 

; Scale u(n) Q20 to Q26, Saturate(1>u(n)>0), and save history

      LSL   ACC, #6                            ; ACC = Q26, based on Q26 coef & e(n)

      MINL  ACC, *XAR3++                       ; Saturate to < 0.999999.. in (Q26)

      MAXL  ACC, *XAR3                         ; Saturate to > 0.000000.. in (Q26)

      MOVL  @CNTL_2P2Z_DBUFF:n:, ACC     ; u(n-1) = u(n) = ACC (Q26)

 

; move to Uout as a Q15

      LSL   ACC, #5                            ; Convert from Q26 to Q31

CL_2P2Z:n:exit:

      MOV         *XAR2, AH                          ; Output Duty (Q15) to terminal net

                  .endm

;====================================

 

Best regards, Leo Bosch.

  • 0
    Genius 4925 points

    Hi Leo,

    I don't know DC/DC LED Dev Kit exactl but from what you describe it might be a problem with the 2P2Z parameters. Do you have a differential part in your compensator? If yes, cancel it and see if this pulse remains.

    Best regards

    Andreas

  • 0 in reply to andreas von kaenel
    Guru 23000 points

    ;----------------------------------------------------------------------------------

    ;     FILE:             ControlLaw2P2Z.h

    ;

    ;     Description:      2nd Order Control Law Macro Module, based on IIR filter structure

    ;

    ;     Version:          1.0

    ;

    ;   Target:             TMS320F28xx

    ;

    ;----------------------------------------------------------------------------------

    ;  Copyright Texas Instruments © 2007

    ;----------------------------------------------------------------------------------

    ;  Revision History:

    ;----------------------------------------------------------------------------------

    ;  Date          | Description

    ;----------------------------------------------------------------------------------

    ;  12/04/05  | Release 1.0         New release with pointer to coefficients.

    ;  05/25/05  | Release 1.1         u(n) clamped before storing as history

    ;----------------------------------------------------------------------------------

     

    ;============================================================================

    ;     Control Law Macro module - 2 Pole / 2 Zero compensator

    ;============================================================================

    ;                 ______________________

    ;                 |     ControlLaw_2P2Z     |

    ;                 |~~~~~~~~~~~~~~~~~~~~~|

    ;           -->| Ref                       |

    ;                 |                         Out |-->

    ;           -->| Fdbk                      |

    ;                 |                              |

    ;           <--| Coef                      |

    ;                 |_____________________|

    ;

    ;           Ref, Fdbk, Coef, Out: pointers to Signal Nets

    ;

    ; Description:

    ; ------------

    ; Performs a second order difference equation of the form:

    ;

    ;                 B2 z^-2 + B1 z^-1 + B0

    ; U(z)/E(z) = --------------------------

    ;                 -A2 z^-2 - A1 z^1 + 1  

    ;

    ; u(n)= A1*u(n-1)+A2*u(n-2)+B0*e(n)+B1*e(n-1)+B2*e(n-2)

    ;

    ; where     u(n-1) => output from last sample cycle

    ;           u(n-2) => output from 2 samples past

    ;           e(n)   => present error

    ;           e(n-1) => error from last sample cycle

    ;           e(n-2) => error from 2 samples past

    ;

    ;           |--------|

    ;           | u(n-1) |0  CNTL_2P2Z_DBUFF

    ;           |--------|

    ;           | u(n-2) |2

    ;           |--------| 

    ;           |  e(n)  |4

    ;           |--------| 

    ;           | e(n-1) |6

    ;           |--------|

    ;           | e(n-2) |8

    ;           |--------|

    ;

    ;====================================

     

          Pgain_LED = 140;

          Igain_LED = 80;

          Dgain_LED = 100;

     

    // Coefficient init for LED Loop

          Coef2P2Z_LED[0] = Dgain_LED * 67108; // B2

          Coef2P2Z_LED[1] = (Igain_LED - Pgain_LED - Dgain_LED - Dgain_LED)*67108; // B1

          Coef2P2Z_LED[2] = (Pgain_LED + Igain_LED + Dgain_LED)*67108; // B0

          Coef2P2Z_LED[3] = 0; // A2 = 0

          Coef2P2Z_LED[4] = 67108864; // A1 = 1 in Q26

          Coef2P2Z_LED[5] = Dmax_LED * 67108; // Clamp Hi limit (Q26)

          Coef2P2Z_LED[6] = 0x00000000; // Clamp Lo

     

    What do you think goes wrong here?

     

    Best regards, Leo

  • 0 in reply to Leo Bosch
    Genius 4925 points

    I will try to explain my thoughts a little bit closer:
    If you have a setpoint lets say of 100, output of the 2P2Z is 100 too, and feedback 100 as well (stable steady state) everything is nice and smooth. Now you clear the setpoint to 0 - and as you said, ADC result (which is the feedback - right) is 0 too for whatever reason. The D part of your controller will amplify this change of the setvalue dramatically depending of the D-gain. So if you minimize the D-Gain (or take care that the ADC is not 0 before the output reaches 0) this phenomena should be gone - correct me if I am wrong...

    Regards

    Andreas

  • 0 in reply to andreas von kaenel
    Guru 23000 points

    Your explanation is very clearly and I understand the problem now.

    Would the Fdbk(ADC) goes negative there would be no problem in this module, it can get a stable state again, true?

    But in this case the ADC (Fdbk) can’t go negative, so the best way is to check for ‘0’ Ref and force the output also Low, and my solution is (accidentally) the best way without needing to change parameters which are Ok in operational condition.

     

    But by the way, what means ‘D-part/D-gain’ and also P- and I-gain?

     

    Thanks,

    Best regards, Leo

  • 0 in reply to Leo Bosch
    Genius 4925 points

    Leo,

    Leo Bosch said:

    Would the Fdbk(ADC) goes negative there would be no problem in this module, it can get a stable state again, true?
    But in this case the ADC (Fdbk) can’t go negative, so the best way is to check for ‘0’ Ref and force the output also Low, and my solution is (accidentally) the best way without needing to change parameters which are Ok in operational condition.

    as I said, I am not aware of your application - one thing you could try is introduce a slew rate limiter for your reference input, to avoid infinite slopes

    The PID controller is nothing but a special case of the 2P2Z compensator. PID control theory is well known and described in countless books and online resources. Check out a wikipedia page for the details. In the documentation of the LED Kit there will be most likely a hint on PID controllers in the 2P2Z section... There you will get accurate answers.

    Quick and dirty:
    P is the proportional part of your controller
    I the integral part
    D the differential part

    by tuning these factors you can change the overall system behavior.

    Regards

    Andreas