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LAUNCHXL-F28377S: Setting the DAC level for DAC8560 from TMS320F28377S via SPI

Part Number: LAUNCHXL-F28377S

Hello TI community,

I am currently trying to communicate to the DAC8560 (http://www.ti.com/lit/ds/symlink/dac8560.pdf with my TMS320F28377S via SPI. The problem I am having is that the F28377S SPI shift register is 16 bits while the shift register on the DAC8560 is 24 bits. On page 20 of the DAC8560 data sheet is has two clauses that I think will cause be trouble. The first piece of information is that the chip-select signal must be brought high before each new write sequence. I am assuming this means I can only write 24-bits of data at a time before having to bring the chip-select line high. The second piece of information is that if the chip-select signal is brought high before the 24th falling edge, it acts as an interrupt to the write sequence. It then will reset the shift register and the write sequence will be seen as invalid; therefore, the DAC register will not be updated. The problem is that the TMS320F28377S says that each time it finishes sending it's maximum number of bits (in this case 16) it will bring the chip select signal high automatically. I was wondering if there is any way that I can get around this.

  • Brenden,

    You can work around this by configuring the CS pin as a GPIO and manually assert/deassert the signal whenever you perform SPI operations.

    -Tommy
  • Hi Brenden,

    You can do this by using the FIFO to send two 12-bit words.  See the timing diagram in the datasheet here:

    Note that the select will stay active for back-to-back transmissions.

    You can also use a GPIO instead of the dedicated chip-select pin (and this can be the same GPIO that the chip select comes out of).  In this case, you would use SW to toggle the GPIO low, write to the SPI data registers, wait for the flag/interrupt indicating SPI data has been transmitted, and then toggle the GPIO back high.  This method also works if you want to use a different GPIO for the chip select than whatever the GPIO MUX allows.

  • Hi Devin, so I was looking into the FIFO, specifically the controlSuite example. I notice that data is being directly to SPITXBUF. I am wondering if there is a TXFIFO register I am missing or if I am misunderstanding what the TXFIFO is altogether.