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TMS320F28377D: Regarding FFT

Part Number: TMS320F28377D
Other Parts Discussed in Thread: CONTROLSUITE

Hi,

We want to perfrom forward and inverse FFT of 256 sample real data(Array) using TMS320f28377D with library c28x_vcu2_library_fpu32.lib.

So we have been exploring controlsuite example project 2837x_vcu2_rfft_256.

Forward FFT is done using following steps:

// Step 1: Initialize CFFT object

CFFT.pInBuffer = buffer1Q15;

CFFT.pOutBuffer = buffer2Q15;

CFFT.init = (void (*)(void *))CFFT_init128Pt;

CFFT.run = (void (*)(void *))CFFT_run128Pt;

// Step 2: Initialize the handle

handleCFFT = &CFFT;

// Step 3: Calling the init() will setup the twiddle factor table

// and run the Forward FFT followed by an unpacking routine

CFFT.init(handleCFFT);

CFFT.run(handleCFFT);

CFFT_unpack(handleCFFT);

This project didnt have inverse FFT in it so we've included it performing following steps:

// Step 1: Switch the input and output pointers of the CFFT object

pTemp = CFFT.pInBuffer;

CFFT.pInBuffer = CFFT.pOutBuffer;

CFFT.pOutBuffer = pTemp;

// Step 2: Assign the IFFT function to the run pointer

CFFT.run = (void (*)(void *))ICFFT_run128Pt;

// Step 3: Run the routine

CFFT_pack(handleCFFT);

CFFT.run(handleCFFT);

CFFT_conjugate(handleCFFT->pOutBuffer, handleCFFT->nSamples);

we have performed forward and inverse FFT within same example.

Input array provided is of 256 points.

Output obtained after inverse FFT is not the same as input.

Input(for forward FFT) and Output(from ICFFT_run128Pt) array are plotted and shown below:

Input: (+/- 4096 Vpk)

Output: (+/- 1000 Vpk) with distortion.

The output from ICFFT_run128Pt is distorted as well as scaled down by a factor of 4.

Is there any solution for this problem?

Guide us if we are doing wrong.

 

Regards,

Shashank.

  • Hi Shashank,

    Amtech said:
    The output from ICFFT_run128Pt is distorted as well as scaled down by a factor of 4.

    The answer is probably related to this query : e2e.ti.com/.../2029513

    The pack function does a divide by 4, this is to prevent overflows. You can tweak this in the code, although you should probably just scale up after the IFFT

    _CFFT_pack:
        CFFT_CONTEXT_SAVE
        VSETCPACK                                    ; set CPACK bit to 1 [Lo:Hi] = [Re:Im]
        SETC      SXM                                ; Turn on sign extension mode
        ZAPA
        VSATON                                       ; VSTATUS.SAT = 1
        VRNDON                                       ; VSTATUS.RND = 1
        VSETSHR   #17                                ; VSTATUS.SHIFTR = RIGHT_SHIFT, scale by 4
        VSETSHL   #15                                ; VSTATUS.SHIFTL = LEFT_SHIFT

    If you need additional precision (albeit slower) you should take a look at the 32-bit fixed point DSP library