CCS/LAUNCHXL-F28027F: start address: Cannot Evaluate Address /expression

Thanks for your reply Yanming.

I forgot to power on the dc-bus on the drv8305, so it can not see the wave at that time. but now it is ok!  but the datalog function still doesn't work.

your mentioned "change the command file to use it if you wan to use it on F28027F." could you show me how to change the command file or whether i can get some detail information from documentation of TI.

looking forward to your reply.

best wishes for you.

I am using 28027F Launchpad and got the same problem.

Could you kindly show how to revise .cmd file of F28027F so that the datalog can be plotted?

Thank you.

Z

Limit to RAM size, you have to decrease the length of dlog buff in datalog.h as below.

//! \brief Defines the maximum buffer memory length
//!
#define DATA_LOG_BUFF_SIZE  300

and change the .cmd as below if you didn't add any code in lab01b

   P_RAML0     : origin = 0x008000, length = 0x000880     /* on-chip PRAM block L0 */

   D_RAML0     : origin = 0x008880, length = 0x000780     /* on-chip DRAM block L0 */

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0_M1     PAGE = 1

It still does work for me.

did I miss anything?

1. #define DATA_LOG_BUFF_SIZE  300
it has been fixed in "datalog.h"

2. below is my .cmd code revised based on your suggestion.

MEMORY

{

PAGE 0:   /* Program Memory */

           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */

   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */

   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */

   CSM_PWL_P0  : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA. CSM password locations in FLASHA */

   IQTABLES    : origin = 0x3FE000, length = 0x000B50     /* IQ Math Tables in Boot ROM */

   IQTABLES2   : origin = 0x3FEB50, length = 0x00008C     /* IQ Math Tables in Boot ROM */

   IQTABLES3   : origin = 0x3FEBDC, length = 0x0000AA   /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */

   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM */

   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM */

   FLASHB_D    : origin = 0x3F0000, length = 0x006000     /* on-chip FLASH B, C and D */

   D_FLASHA    : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH A */

   //original code

   //P_RAML0     : origin = 0x008000, length = 0x000980     /* on-chip PRAM block L0 */

   // revised by zc 08082017

   P_RAML0     : origin = 0x008000, length = 0x000880     /* on-chip PRAM block L0 */ 

   // end of revision 1

PAGE 1 :   /* Data Memory */

           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */

           /* Registers remain on PAGE1                                                 */

   RAMM0_M1    : origin = 0x000000, length = 0x000600     /* on-chip RAM block M0 + M1. 0x600 to 0x800 reserved for InstaSPIN */

   //original code

   //D_RAML0     : origin = 0x008980, length = 0x000680     /* on-chip DRAM block L0 */

   // revised by zc 08082017

   D_RAML0     : origin = 0x008880, length = 0x000780     /* on-chip DRAM block L0 */

   // end of revision 2

}

/* Allocate sections to memory blocks.

   Note:

         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code

                   execution when booting to flash

       ramfuncs  user defined section to store functions that will be copied from Flash into RAM

*/

SECTIONS

{

   /* Allocate program areas: */

   .cinit              : > FLASHB_D     PAGE = 0

   .pinit              : > FLASHB_D,    PAGE = 0

   .text              : > FLASHB_D     PAGE = 0

   codestart           : > BEGIN        PAGE = 0

   ramfuncs            : LOAD = FLASHB_D,

                         RUN = P_RAML0,

                         LOAD_START(_RamfuncsLoadStart),

                         LOAD_END(_RamfuncsLoadEnd),

                         RUN_START(_RamfuncsRunStart),

                         PAGE = 0

   csmpasswds          : > CSM_PWL_P0   PAGE = 0

   csm_rsvd            : > CSM_RSVD     PAGE = 0

   /* Allocate uninitalized data sections: */

      .stack             : > D_RAML0     PAGE = 1

   // revised by zc 08082017

   .stack              : > RAMM0_M1     PAGE = 1

   //end revision 3

   .ebss               : > RAMM0_M1     PAGE = 1

   .esysmem            : > RAMM0_M1     PAGE = 1

   ebss_extension      : > P_RAML0      PAGE = 0

   rom_accessed_data   : > RAMM0_M1     PAGE = 1

   vib_buf_data            : > D_RAML0      PAGE = 1

   graph_data          : > D_RAML0      PAGE = 1

   /* Initalized sections go in Flash */

   /* For SDFlash to program these, they must be allocated to page 0 */

   .econst             : > D_FLASHA,    PAGE = 0

   .switch             : > D_FLASHA,    PAGE = 0

   /* Allocate IQ math areas: */

   IQmath              : > FLASHB_D     PAGE = 0           /* Math Code */

   IQmathTables        : > IQTABLES,    PAGE = 0, TYPE = NOLOAD

   /* Uncomment the section below if calling the IQNexp() or IQexp()

      functions from the IQMath.lib library in order to utilize the

      relevant IQ Math table in Boot ROM (This saves space and Boot ROM

      is 1 wait-state). If this section is not uncommented, IQmathTables2

      will be loaded into other memory (SARAM, Flash, etc.) and will take

      up space, but 0 wait-state is possible.

   */

   /*

   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD

   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }

   */

   /* Uncomment the section below if calling the IQNasin() or IQasin()

      functions from the IQMath.lib library in order to utilize the

      relevant IQ Math table in Boot ROM (This saves space and Boot ROM

      is 1 wait-state). If this section is not uncommented, IQmathTables3

      will be loaded into other memory (SARAM, Flash, etc.) and will take

      up space, but 0 wait-state is possible.

   */

   /*

   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD

   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }

   */

   /* .reset is a standard section used by the compiler. It contains the */

   /* the address of the start of _c_int00 for C Code. */

   /* When using the boot ROM this section and the CPU vector */

   /* table is not needed. Thus the default type is set here to  */

   /* DSECT */

   .reset              : > RESET,      PAGE = 0, TYPE = DSECT

   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*

//===========================================================================

// End of file.

//===========================================================================

As previous reply, limit to the RAM size of F28027F, there is no any remain RAM size to add data and code in lab01b based on my reference cmd file. You can refer to the compile error to adjust the memory section or decrease the datalog buff size to implement the datalog.