• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 82 subscribers
  • Views 306 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28065: ADCINx pin input model : confirmation

Colombo Carlo
Mastermind 24735 points
Part Number: TMS320F28065


Hi Everybody , 

please a confirmation on ADCINx Inpit model :  in the DS  in Fig 8-3  we show a model for the  pin . 

there is no  R in parallel to the sampling capacitor  ( Ch )    :  is this since it is neglectable ?  

thank you very much

bye

Carlo

 

  • 0
    TI__Guru 60865 points
    Hi Carlo,

    Yes, the resistance is high enough that it can be ignored for the sake of designing for good ADC input settling.

    As far as determining the minimum allowed ADC clock rate, this is specified in the datasheet as 1kHz.

    Newer devices and devices from the F2833x family have a minimum clock rate in the MHz range.