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TMS320F28027: What's the maximum rate of input GPIO?

Jae Yang Park
Prodigy 90 points
Part Number: TMS320F28027

Hi,

I am using LAUNCHXL-28027 board. SYSCLOCK is 60MHz.
I have three input GPIO for external interrupt.
- GPIO3 --> XINT1 : pulse width 250ns, duration 600us
- GPIO5 --> XINT2 (it uses for ADCINT1): 4MHz, duty 50%
- GPIO4 --> XINT3 : pulse width 250ns, duration 500us

When I run this, XINT3 is not working.
However, if GPIO5 input frequency is lower like 2MHz, then XINT3 is working.
Input GPIO rate is under 2MHz?

Thank you in advance.

- Jae Yang Park -

===

My configuration is:


//GPIO3, XINT1
void gpio3_config(void)
{
// Set GPIO3
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 0; // GPIO3 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO3 = 0; // 0: input, 1: output
GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 0; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling periods (n=0xFF) = 510 x Tsysclkout = 510 x 16.67ns = 8.5us, n=1, 33.34ns
EDIS;

// GPIO3 is XINT1
EALLOW;
GpioIntRegs.GPIOXINT1SEL.all = 3; // XINT1 is GPIO3
EDIS;

// Configure XINT1
XIntruptRegs.XINT1CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT1CR.bit.ENABLE = 1; // Enable XINT1
}

//GPIO4, XINT3
void gpio4_config(void)
{
// Set GPIO4
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0; // GPIO4 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO4 = 0; // 0: input, 1: output
GpioCtrlRegs.GPAQSEL1.bit.GPIO4 = 0; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling periods (n=0xFF) = 510 x Tsysclkout = 510 x 16.67ns = 8.5us
EDIS;

// GPIO4 is XINT3
EALLOW;
GpioIntRegs.GPIOXINT3SEL.all = 4; // XINT3 is GPIO4
EDIS;

// Configure XINT3
XIntruptRegs.XINT3CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT3CR.bit.ENABLE = 1; // Enable XINT3
}

// GPIO5, XINT2
void gpio5_config(void)
{
// Set GPIO5
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 0; // GPIO5 - general purpose I/O
GpioCtrlRegs.GPADIR.bit.GPIO5 = 0; // 0: input, 1: output
GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 0; // Qualification 00: Synchronize to SYSCLK, 01: 3 Samples, 10: 6 Samples, 11: Asynchronous
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0; // Sampling periods (n=0xFF) = 510 x Tsysclkout = 510 x 16.67ns = 8.5us
EDIS;

// GPIO5 is XINT2
EALLOW;
GpioIntRegs.GPIOXINT2SEL.all = 5; // XINT2 is GPIO5
EDIS;

// Configure XINT2
XIntruptRegs.XINT2CR.bit.POLARITY = 0; // 0: falling, 1: rising, 2: falling, 3: both
XIntruptRegs.XINT2CR.bit.ENABLE = 1; // Enable XINT2
}

  • 0
    TI__Guru* 95315 points

    Jae,

                If the transition on the GPIO pins are independently recognized, it is likely your initialization code is correct (in terms of configuring the GPIO pin for XINT function and the associated interrupt). The fastest toggling that could be recognized would depend on many factors. For example, if your code does nothing monitor a GPIO input for transitions, you would be able to discern a much higher frequency. By the same token, if the CPU is serving other (higher) priority interrupts, it may be unable to respond to an interrupt in time (before the next interrupt arrives), which could be mistaken for "missing" interrupts. It might be helpful to plot the timeline on a graph sheet for all three interrupts (duration of the pulse, interrupt latency, time taken to service the ISR etc). Do not forget to account for the i/p qualification time. It could be that there are other higher priority interrupts clobbering the CPU that prevents the XINT3 interrupt from being serviced. You use "pulse width" and "duration" in the same line, which is confusing.

  • 0 in reply to Hareesh Janakiraman
    Prodigy 90 points
    Hareesh,

    Thank you for your response.

    I meant that pulse width is the width of High level, and duration is the time between the first pulse and the second pulse.

    Three input signals for GPIO are from external board synchronized 4MHz clock signal connected XINT2.
    So, these signals are like following roughly:

    XINT2 ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
    XINT1 __________|_______________________|________________________|____
    XINT3 ________|______|________________|______|___________________|____|__

    In my code , I put counter which is increased when interrupt is occurred in the ISR.
    (I followed the External Interrupt example and AdcSoc example code.)

    Currently when XINT2 is under 2MHz, XINT1 and XINT3 are working, otherwise, I am trying to make it 4MHz, XINT3 is not working.
    What strange thing is when XINT2 is 6MHz, XINT1 and XINT3 are working, but XINT2 is skipped and count is looked like random.

    Still I am trying to change GPIO qualification setting but no luck yet.

    Thank you.

    Jae Yang Park
  • 0 in reply to Jae Yang Park
    TI__Guru* 95315 points

    Please toggle a different GPIO pin when you enter/exit the ISR. By observing these GPIO pins, you can identify the situation that gives rise to what you are seeing.

  • 0 in reply to Hareesh Janakiraman
    Prodigy 90 points
    Of course, in the ISR, different GPIOs are toggling.
    Three external inputs are connected three external interrupts.
    And, in each ISR, there is counting variable to check if interrupt is occurred.
    With same code, when decrease the frequency of signal connected to XINT2, then everything is fine.

    Jae Yang Park
  • 0 in reply to Jae Yang Park
    TI__Guru* 95315 points
    What I meant was this: Set a GPIO pin when you enter the ISR and Clear it when you exit the ISR. Do this for all 3 interrupts and look at the 3 GPIO pins on the scope. That should give you a clue as to why an ISR does not execute. It could be that the CPU is busy servicing other interrupts.