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Tool/software: TI C/C++ Compiler
Hello there,
we´re running a "LaunchXL-F28377S" Evalboard.
We´re facing the effect, that the application doesn´t start, if a too big array is defined, for example a double Array with 200 entries.
I don´t think it´s a lag of RAM, because the Compile doesn´t complain that, plus all the RAM is defined to be used for variables.
The effect is, that the application can be loaded to to flash with the debugger emulator and the visiual program pointer starts at the very first line
of main()
Once the run button is pressed, the application crashes.
Does someone have an idea?
best regards!!
Hello Whintey,
yes, i do so.
To be honest, i´m not sure, which .cmd file the compiler uses. By looking in the project properties->Build->C2000 Linker-> "Summary of flags set" the direction is
ti\controlSUITE\device_support\F2837xS\v210\F2837xS_common\cmd
There are several .cmd files; from the installed examples i guess
best regards,
Jasson
The .map file
i´m sorry, for some reason, my Laptop doesn´t load up the file using the "Insert File" function, find below that the .cmd file
******************************************************************************
TMS320C2000 Linker PC v15.12.3
******************************************************************************
>> Linked Thu May 18 11:01:15 2017
OUTPUT FILE NAME: <SW_Board_02.out>
ENTRY POINT SYMBOL: "code_start" address: 00080000
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
RAMM0 00000122 000002de 00000000 000002de RWIX
RAMLS0 00008000 00000800 00000094 0000076c RWIX
RAMLS1 00008800 00000800 00000000 00000800 RWIX
RAMLS2 00009000 00000800 00000000 00000800 RWIX
RAMLS3 00009800 00000800 00000000 00000800 RWIX
RAMLS4 0000a000 00000800 00000000 00000800 RWIX
RAMD0 0000b000 00000800 00000000 00000800 RWIX
BEGIN 00080000 00000002 00000002 00000000 RWIX
FLASHA 00080002 00001ffe 00000000 00001ffe RWIX
FLASHB 00082000 00002000 00002000 00000000 RWIX
FLASHC 00084000 00002000 000009b1 0000164f RWIX
FLASHD 00086000 00002000 00000094 00001f6c RWIX
FLASHE 00088000 00008000 00000000 00008000 RWIX
FLASHF 00090000 00008000 00000328 00007cd8 RWIX
FLASHG 00098000 00008000 00000000 00008000 RWIX
FLASHH 000a0000 00008000 00000000 00008000 RWIX
FLASHI 000a8000 00008000 00000000 00008000 RWIX
FLASHJ 000b0000 00008000 00000000 00008000 RWIX
FLASHK 000b8000 00002000 00000000 00002000 RWIX
FLASHL 000ba000 00002000 00000000 00002000 RWIX
FLASHM 000bc000 00002000 00000000 00002000 RWIX
FLASHN 000be000 00002000 00000000 00002000 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
PAGE 1:
BOOT_RSVD 00000002 00000120 00000000 00000120 RWIX
RAMM1 00000400 00000400 00000100 00000300 RWIX
ADCA_RESULT 00000b00 00000020 00000018 00000008 RWIX
ADCB_RESULT 00000b20 00000020 00000018 00000008 RWIX
ADCC_RESULT 00000b40 00000020 00000018 00000008 RWIX
ADCD_RESULT 00000b60 00000020 00000018 00000008 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000200 000001c0 00000040 RWIX
DMA 00001000 00000200 000000e0 00000120 RWIX
CLA1 00001400 00000040 0000003e 00000002 RWIX
EPWM1 00004000 00000100 00000100 00000000 RWIX
EPWM2 00004100 00000100 00000100 00000000 RWIX
EPWM3 00004200 00000100 00000100 00000000 RWIX
EPWM4 00004300 00000100 00000100 00000000 RWIX
EPWM5 00004400 00000100 00000100 00000000 RWIX
EPWM6 00004500 00000100 00000100 00000000 RWIX
EPWM7 00004600 00000100 00000100 00000000 RWIX
EPWM8 00004700 00000100 00000100 00000000 RWIX
EPWM9 00004800 00000100 00000100 00000000 RWIX
EPWM10 00004900 00000100 00000100 00000000 RWIX
EPWM11 00004a00 00000100 00000100 00000000 RWIX
EPWM12 00004b00 00000100 00000100 00000000 RWIX
ECAP1 00005000 00000020 00000020 00000000 RWIX
ECAP2 00005020 00000020 00000020 00000000 RWIX
ECAP3 00005040 00000020 00000020 00000000 RWIX
ECAP4 00005060 00000020 00000020 00000000 RWIX
ECAP5 00005080 00000020 00000020 00000000 RWIX
ECAP6 000050a0 00000020 00000020 00000000 RWIX
EQEP1 00005100 00000040 00000022 0000001e RWIX
EQEP2 00005140 00000040 00000022 0000001e RWIX
EQEP3 00005180 00000040 00000022 0000001e RWIX
DACA 00005c00 00000010 00000008 00000008 RWIX
DACB 00005c10 00000010 00000008 00000008 RWIX
DACC 00005c20 00000010 00000008 00000008 RWIX
CMPSS1 00005c80 00000020 00000020 00000000 RWIX
CMPSS2 00005ca0 00000020 00000020 00000000 RWIX
CMPSS3 00005cc0 00000020 00000020 00000000 RWIX
CMPSS4 00005ce0 00000020 00000020 00000000 RWIX
CMPSS5 00005d00 00000020 00000020 00000000 RWIX
CMPSS6 00005d20 00000020 00000020 00000000 RWIX
CMPSS7 00005d40 00000020 00000020 00000000 RWIX
CMPSS8 00005d60 00000020 00000020 00000000 RWIX
SDFM1 00005e00 00000080 00000080 00000000 RWIX
SDFM2 00005e80 00000080 00000080 00000000 RWIX
MCBSPA 00006000 00000040 00000024 0000001c RWIX
MCBSPB 00006040 00000040 00000024 0000001c RWIX
SPIA 00006100 00000010 00000010 00000000 RWIX
SPIB 00006110 00000010 00000010 00000000 RWIX
*** 00006120 00000010 00000010 00000000 RWIX
SPID 00006130 00000010 00000000 00000010 RWIX
UPP 00006200 00000100 00000048 000000b8 RWIX
WD 00007000 00000040 0000002b 00000015 RWIX
NMIINTRUPT 00007060 00000010 00000007 00000009 RWIX
XINT 00007070 00000010 0000000b 00000005 RWIX
SCIA 00007200 00000010 00000010 00000000 RWIX
SCIB 00007210 00000010 00000010 00000000 RWIX
SCIC 00007220 00000010 00000010 00000000 RWIX
SCID 00007230 00000010 00000010 00000000 RWIX
I2CA 00007300 00000040 00000022 0000001e RWIX
I2CB 00007340 00000040 00000022 0000001e RWIX
ADCA 00007400 00000080 00000080 00000000 RWIX
ADCB 00007480 00000080 00000080 00000000 RWIX
ADCC 00007500 00000080 00000080 00000000 RWIX
ADCD 00007580 00000080 00000080 00000000 RWIX
INPUT_XBAR 00007900 00000020 00000020 00000000 RWIX
XBAR 00007920 00000020 00000020 00000000 RWIX
SYNC_SOC 00007940 00000010 00000006 0000000a RWIX
DMACLASRCSEL 00007980 00000040 0000001a 00000026 RWIX
EPWM_XBAR 00007a00 00000040 00000040 00000000 RWIX
CLB_XBAR 00007a40 00000040 00000000 00000040 RWIX
OUTPUT_XBAR 00007a80 00000040 00000040 00000000 RWIX
GPIOCTRL 00007c00 00000180 00000180 00000000 RWIX
GPIODAT 00007f00 00000030 00000030 00000000 RWIX
RAMLS5 0000a800 00000800 000007f6 0000000a RWIX
RAMD1 0000b800 00000800 00000000 00000800 RWIX
RAMGS0 0000c000 00001000 00000000 00001000 RWIX
RAMGS1 0000d000 00001000 00000000 00001000 RWIX
RAMGS2 0000e000 00001000 00000000 00001000 RWIX
RAMGS3 0000f000 00001000 00000000 00001000 RWIX
RAMGS4 00010000 00001000 00000000 00001000 RWIX
RAMGS5 00011000 00001000 00000000 00001000 RWIX
RAMGS6 00012000 00001000 00000000 00001000 RWIX
RAMGS7 00013000 00001000 00000000 00001000 RWIX
RAMGS8 00014000 00001000 00000000 00001000 RWIX
RAMGS9 00015000 00001000 00000000 00001000 RWIX
RAMGS10 00016000 00001000 00000000 00001000 RWIX
RAMGS11 00017000 00001000 00000000 00001000 RWIX
EMIF1 00047000 00000800 00000070 00000790 RWIX
EMIF2 00047800 00000800 00000070 00000790 RWIX
CANA 00048000 00000800 00000000 00000800 RWIX
CANB 0004a000 00000800 00000000 00000800 RWIX
FLASHPUMPSEMAPHORE 00050024 00000002 00000002 00000000 RWIX
DEV_CFG 0005d000 00000180 0000012e 00000052 RWIX
ANALOG_SUBSYS 0005d180 00000080 00000048 00000038 RWIX
CLK_CFG 0005d200 00000100 00000032 000000ce RWIX
CPU_SYS 0005d300 00000100 00000082 0000007e RWIX
ROMPREFETCH 0005e608 00000002 00000002 00000000 RWIX
DCSM_Z1 0005f000 00000030 00000024 0000000c RWIX
DCSM_Z2 0005f040 00000030 00000024 0000000c RWIX
DCSM_COMMON 0005f070 00000010 00000008 00000008 RWIX
MEMCFG 0005f400 00000080 00000080 00000000 RWIX
EMIF1CONFIG 0005f480 00000020 00000020 00000000 RWIX
EMIF2CONFIG 0005f4a0 00000020 00000020 00000000 RWIX
ACCESSPROTECTION 0005f4c0 00000040 00000040 00000000 RWIX
MEMORYERROR 0005f500 00000040 00000040 00000000 RWIX
ROMWAITSTATE 0005f540 00000002 00000002 00000000 RWIX
FLASH0_CTRL 0005f800 00000300 00000182 0000017e RWIX
FLASH0_ECC 0005fb00 00000040 00000028 00000018 RWIX
FLASH1_CTRL 0005fc00 00000300 00000182 0000017e RWIX
FLASH1_ECC 0005ff00 00000040 00000028 00000018 RWIX
DCSM_Z1_OTP 00078000 00000020 00000020 00000000 RWIX
DCSM_Z2_OTP 00078200 00000020 00000020 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
codestart
* 0 00080000 00000002
00080000 00000002 F2837xS_CodeStartBranch.obj (codestart)
.cinit 0 00082000 00000088
00082000 00000028 epwm_trip_zone.obj (.cinit)
00082028 00000019 dac.obj (.cinit)
00082041 00000014 serialUART.obj (.cinit)
00082055 0000000e rts2800_fpu32.lib : exit.obj (.cinit)
00082063 00000008 ADCSource.obj (.cinit)
0008206b 00000005 rts2800_fpu32.lib : _lock.obj (.cinit:__lock)
00082070 00000005 : _lock.obj (.cinit:__unlock)
00082075 00000005 : vars.obj (.cinit)
0008207a 00000004 F2837xS_DefaultISR.obj (.cinit)
0008207e 00000004 adc.obj (.cinit)
00082082 00000004 rts2800_fpu32.lib : memory.obj (.cinit)
00082086 00000002 --HOLE-- [fill = 0]
.pinit 0 00082000 00000000 UNINITIALIZED
.switch 0 00082088 00000020
00082088 00000020 dac.obj (.switch:_spiAint)
.TI.ramfunc
* 0 00086000 00000094 RUN ADDR = 00008000
00086000 00000090 F2837xS_SysCtrl.obj (.TI.ramfunc)
00086090 00000004 F2837xS_usDelay.obj (.TI.ramfunc)
.stack 1 00000400 00000100 UNINITIALIZED
00000400 00000100 --HOLE--
.esysmem 1 0000a800 00000400 UNINITIALIZED
0000a800 00000001 rts2800_fpu32.lib : memory.obj (.esysmem)
0000a801 000003ff --HOLE--
.reset 0 003fffc0 00000002 DSECT
003fffc0 00000002 rts2800_fpu32.lib : boot.obj (.reset)
.text.1 0 000820a8 00001f58
000820a8 0000058f F2837xS_DefaultISR.obj (.text:retain)
00082637 00000001 rts2800_fpu32.lib : newhandler.obj (.text)
00082638 000004cf epwm_trip_zone.obj (.text)
00082b07 0000049c UARTsrcSnk.obj (.text)
00082fa3 00000384 F2837xS_SysCtrl.obj (.text)
00083327 00000242 ADCSource.obj (.text)
00083569 000001d4 F2837xS_Gpio.obj (.text)
0008373d 000001d2 rts2800_fpu32.lib : memory.obj (.text)
0008390f 00000196 Transform.obj (.text)
00083aa5 0000016e PWMsink.obj (.text)
00083c13 00000001 rts2800_fpu32.lib : startup.obj (.text)
00083c14 0000016a ThreePhaseBase.obj (.text)
00083d7e 00000162 epwm_trip_zone.obj (.text:retain)
00083ee0 000000db IOExpander.obj (.text)
00083fbb 00000029 rts2800_fpu32.lib : exit.obj (.text)
00083fe4 0000001a : cpy_utils.obj (.text)
00083ffe 00000002 : pre_init.obj (.text)
.text.2 0 00084000 000009b1
00084000 000000d4 F2837xS_Adc.obj (.text)
000840d4 000000b2 adc.obj (.text:retain)
00084186 000000b2 dac.obj (.text:retain)
00084238 000000a4 DACSink.obj (.text)
000842dc 0000009d serialUART.obj (.text:retain)
00084379 0000009a serialUART.obj (.text)
00084413 00000096 ThreePhsSysCoordinator.obj (.text)
000844a9 00000092 ThreePhsSysOutput.obj (.text)
0008453b 0000008a dac.obj (.text)
000845c5 00000088 rts2800_fpu32.lib : fs_div.obj (.text)
0008464d 00000079 OnePhaseBase.obj (.text)
000846c6 0000005e EXTADC.obj (.text)
00084724 00000058 EXTADCMAX11605.obj (.text)
0008477c 00000056 ThreePhsSysInput.obj (.text)
000847d2 00000056 rts2800_fpu32.lib : boot.obj (.text)
00084828 00000047 SysCommons.obj (.text)
0008486f 00000046 rts2800_fpu32.lib : cpy_tbl.obj (.text)
000848b5 00000028 F2837xS_PieCtrl.obj (.text)
000848dd 00000023 OnePhsSysInput.obj (.text)
00084900 00000022 rts2800_fpu32.lib : i_div.obj (.text)
00084922 00000020 : new_.obj (.text)
00084942 0000001e : memcpy.obj (.text)
00084960 00000019 adc.obj (.text)
00084979 00000019 rts2800_fpu32.lib : args_main.obj (.text)
00084992 00000011 F2837xS_PieVect.obj (.text)
000849a3 00000009 rts2800_fpu32.lib : _lock.obj (.text)
000849ac 00000005 : delete.obj (.text)
.econst 0 00090000 00000328
00090000 000001c0 F2837xS_PieVect.obj (.econst:_PieVectTableInit)
000901c0 00000050 ThreePhsSysInput.obj (.econst:_ph1)
00090210 00000050 ThreePhsSysInput.obj (.econst:_ph2)
00090260 00000050 ThreePhsSysInput.obj (.econst:_ph3)
000902b0 00000008 ADCSource.obj (.econst:___vtbl__10ADC_Source)
000902b8 00000008 SysCommons.obj (.econst:___vtbl__10SysCommons)
000902c0 00000008 UARTsrcSnk.obj (.econst:___vtbl__10UARTsrcSnk)
000902c8 00000008 IOExpander.obj (.econst:___vtbl__11IO_Expander)
000902d0 00000008 OnePhaseBase.obj (.econst:___vtbl__12OnePhaseBase)
000902d8 00000008 OnePhsSysInput.obj (.econst:___vtbl__14OnePhsSysInput)
000902e0 00000008 ThreePhaseBase.obj (.econst:___vtbl__14ThreePhaseBase)
000902e8 00000008 EXTADCMAX11605.obj (.econst:___vtbl__16EXT_ADC_MAX11605)
000902f0 00000008 ThreePhsSysInput.obj (.econst:___vtbl__16ThreePhsSysInput)
000902f8 00000008 ThreePhsSysOutput.obj (.econst:___vtbl__17ThreePhsSysOutput)
00090300 00000008 ThreePhsSysCoordinator.obj (.econst:___vtbl__22ThreePhsSysCoordinator)
00090308 00000008 DACSink.obj (.econst:___vtbl__7DACSink)
00090310 00000008 EXTADC.obj (.econst:___vtbl__7EXT_ADC)
00090318 00000008 PWMsink.obj (.econst:___vtbl__7PWMsink)
00090320 00000008 Transform.obj (.econst:___vtbl__9Transform)
AdcaResultFile
* 1 00000b00 00000018 UNINITIALIZED
00000b00 00000018 F2837xS_GlobalVariableDefs.obj (AdcaResultFile)
AdcbResultFile
* 1 00000b20 00000018 UNINITIALIZED
00000b20 00000018 F2837xS_GlobalVariableDefs.obj (AdcbResultFile)
AdccResultFile
* 1 00000b40 00000018 UNINITIALIZED
00000b40 00000018 F2837xS_GlobalVariableDefs.obj (AdccResultFile)
AdcdResultFile
* 1 00000b60 00000018 UNINITIALIZED
00000b60 00000018 F2837xS_GlobalVariableDefs.obj (AdcdResultFile)
CpuTimer0RegsFile
* 1 00000c00 00000008 UNINITIALIZED
00000c00 00000008 F2837xS_GlobalVariableDefs.obj (CpuTimer0RegsFile)
CpuTimer1RegsFile
* 1 00000c08 00000008 UNINITIALIZED
00000c08 00000008 F2837xS_GlobalVariableDefs.obj (CpuTimer1RegsFile)
CpuTimer2RegsFile
* 1 00000c10 00000008 UNINITIALIZED
00000c10 00000008 F2837xS_GlobalVariableDefs.obj (CpuTimer2RegsFile)
PieCtrlRegsFile
* 1 00000ce0 0000001a UNINITIALIZED
00000ce0 0000001a F2837xS_GlobalVariableDefs.obj (PieCtrlRegsFile)
PieVectTableFile
* 1 00000d00 000001c0 UNINITIALIZED
00000d00 000001c0 F2837xS_GlobalVariableDefs.obj (PieVectTableFile)
EmuKeyVar
* 1 00000d00 00000001 UNINITIALIZED
00000d00 00000001 F2837xS_GlobalVariableDefs.obj (EmuKeyVar)
EmuBModeVar
* 1 00000d01 00000001 UNINITIALIZED
00000d01 00000001 F2837xS_GlobalVariableDefs.obj (EmuBModeVar)
FlashCallbackVar
* 1 00000d02 00000000 UNINITIALIZED
FlashScalingVar
* 1 00000d02 00000000 UNINITIALIZED
DmaRegsFile
* 1 00001000 000000e0 UNINITIALIZED
00001000 000000e0 F2837xS_GlobalVariableDefs.obj (DmaRegsFile)
Cla1RegsFile
* 1 00001400 0000003e UNINITIALIZED
00001400 0000003e F2837xS_GlobalVariableDefs.obj (Cla1RegsFile)
EPwm1RegsFile
* 1 00004000 00000100 UNINITIALIZED
00004000 00000100 F2837xS_GlobalVariableDefs.obj (EPwm1RegsFile)
EPwm2RegsFile
* 1 00004100 00000100 UNINITIALIZED
00004100 00000100 F2837xS_GlobalVariableDefs.obj (EPwm2RegsFile)
EPwm3RegsFile
* 1 00004200 00000100 UNINITIALIZED
00004200 00000100 F2837xS_GlobalVariableDefs.obj (EPwm3RegsFile)
EPwm4RegsFile
* 1 00004300 00000100 UNINITIALIZED
00004300 00000100 F2837xS_GlobalVariableDefs.obj (EPwm4RegsFile)
EPwm5RegsFile
* 1 00004400 00000100 UNINITIALIZED
00004400 00000100 F2837xS_GlobalVariableDefs.obj (EPwm5RegsFile)
EPwm6RegsFile
* 1 00004500 00000100 UNINITIALIZED
00004500 00000100 F2837xS_GlobalVariableDefs.obj (EPwm6RegsFile)
EPwm7RegsFile
* 1 00004600 00000100 UNINITIALIZED
00004600 00000100 F2837xS_GlobalVariableDefs.obj (EPwm7RegsFile)
EPwm8RegsFile
* 1 00004700 00000100 UNINITIALIZED
00004700 00000100 F2837xS_GlobalVariableDefs.obj (EPwm8RegsFile)
EPwm9RegsFile
* 1 00004800 00000100 UNINITIALIZED
00004800 00000100 F2837xS_GlobalVariableDefs.obj (EPwm9RegsFile)
EPwm10RegsFile
* 1 00004900 00000100 UNINITIALIZED
00004900 00000100 F2837xS_GlobalVariableDefs.obj (EPwm10RegsFile)
EPwm11RegsFile
* 1 00004a00 00000100 UNINITIALIZED
00004a00 00000100 F2837xS_GlobalVariableDefs.obj (EPwm11RegsFile)
EPwm12RegsFile
* 1 00004b00 00000100 UNINITIALIZED
00004b00 00000100 F2837xS_GlobalVariableDefs.obj (EPwm12RegsFile)
ECap1RegsFile
* 1 00005000 00000020 UNINITIALIZED
00005000 00000020 F2837xS_GlobalVariableDefs.obj (ECap1RegsFile)
ECap2RegsFile
* 1 00005020 00000020 UNINITIALIZED
00005020 00000020 F2837xS_GlobalVariableDefs.obj (ECap2RegsFile)
ECap3RegsFile
* 1 00005040 00000020 UNINITIALIZED
00005040 00000020 F2837xS_GlobalVariableDefs.obj (ECap3RegsFile)
ECap4RegsFile
* 1 00005060 00000020 UNINITIALIZED
00005060 00000020 F2837xS_GlobalVariableDefs.obj (ECap4RegsFile)
ECap5RegsFile
* 1 00005080 00000020 UNINITIALIZED
00005080 00000020 F2837xS_GlobalVariableDefs.obj (ECap5RegsFile)
ECap6RegsFile
* 1 000050a0 00000020 UNINITIALIZED
000050a0 00000020 F2837xS_GlobalVariableDefs.obj (ECap6RegsFile)
EQep1RegsFile
* 1 00005100 00000022 UNINITIALIZED
00005100 00000022 F2837xS_GlobalVariableDefs.obj (EQep1RegsFile)
EQep2RegsFile
* 1 00005140 00000022 UNINITIALIZED
00005140 00000022 F2837xS_GlobalVariableDefs.obj (EQep2RegsFile)
EQep3RegsFile
* 1 00005180 00000022 UNINITIALIZED
00005180 00000022 F2837xS_GlobalVariableDefs.obj (EQep3RegsFile)
DacaRegsFile
* 1 00005c00 00000008 UNINITIALIZED
00005c00 00000008 F2837xS_GlobalVariableDefs.obj (DacaRegsFile)
DacbRegsFile
* 1 00005c10 00000008 UNINITIALIZED
00005c10 00000008 F2837xS_GlobalVariableDefs.obj (DacbRegsFile)
DaccRegsFile
* 1 00005c20 00000008 UNINITIALIZED
00005c20 00000008 F2837xS_GlobalVariableDefs.obj (DaccRegsFile)
Cmpss1RegsFile
* 1 00005c80 00000020 UNINITIALIZED
00005c80 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss1RegsFile)
Cmpss2RegsFile
* 1 00005ca0 00000020 UNINITIALIZED
00005ca0 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss2RegsFile)
Cmpss3RegsFile
* 1 00005cc0 00000020 UNINITIALIZED
00005cc0 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss3RegsFile)
Cmpss4RegsFile
* 1 00005ce0 00000020 UNINITIALIZED
00005ce0 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss4RegsFile)
Cmpss5RegsFile
* 1 00005d00 00000020 UNINITIALIZED
00005d00 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss5RegsFile)
Cmpss6RegsFile
* 1 00005d20 00000020 UNINITIALIZED
00005d20 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss6RegsFile)
Cmpss7RegsFile
* 1 00005d40 00000020 UNINITIALIZED
00005d40 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss7RegsFile)
Cmpss8RegsFile
* 1 00005d60 00000020 UNINITIALIZED
00005d60 00000020 F2837xS_GlobalVariableDefs.obj (Cmpss8RegsFile)
AdcaRegsFile
* 1 00007400 00000080 UNINITIALIZED
00007400 00000080 F2837xS_GlobalVariableDefs.obj (AdcaRegsFile)
AdcbRegsFile
* 1 00007480 00000080 UNINITIALIZED
00007480 00000080 F2837xS_GlobalVariableDefs.obj (AdcbRegsFile)
AdccRegsFile
* 1 00007500 00000080 UNINITIALIZED
00007500 00000080 F2837xS_GlobalVariableDefs.obj (AdccRegsFile)
AdcdRegsFile
* 1 00007580 00000080 UNINITIALIZED
00007580 00000080 F2837xS_GlobalVariableDefs.obj (AdcdRegsFile)
AnalogSubsysRegsFile
* 1 0005d180 00000048 UNINITIALIZED
0005d180 00000048 F2837xS_GlobalVariableDefs.obj (AnalogSubsysRegsFile)
Cla1SoftIntRegsFile
* 1 00000ce0 00000004 DSECT
00000ce0 00000004 F2837xS_GlobalVariableDefs.obj (Cla1SoftIntRegsFile)
Sdfm1RegsFile
* 1 00005e00 00000080 UNINITIALIZED
00005e00 00000080 F2837xS_GlobalVariableDefs.obj (Sdfm1RegsFile)
Sdfm2RegsFile
* 1 00005e80 00000080 UNINITIALIZED
00005e80 00000080 F2837xS_GlobalVariableDefs.obj (Sdfm2RegsFile)
McbspaRegsFile
* 1 00006000 00000024 UNINITIALIZED
00006000 00000024 F2837xS_GlobalVariableDefs.obj (McbspaRegsFile)
McbspbRegsFile
* 1 00006040 00000024 UNINITIALIZED
00006040 00000024 F2837xS_GlobalVariableDefs.obj (McbspbRegsFile)
SpiaRegsFile
* 1 00006100 00000010 UNINITIALIZED
00006100 00000010 F2837xS_GlobalVariableDefs.obj (SpiaRegsFile)
SpibRegsFile
* 1 00006110 00000010 UNINITIALIZED
00006110 00000010 F2837xS_GlobalVariableDefs.obj (SpibRegsFile)
SpicRegsFile
* 1 00006120 00000010 UNINITIALIZED
00006120 00000010 F2837xS_GlobalVariableDefs.obj (SpicRegsFile)
UppRegsFile
* 1 00006200 00000048 UNINITIALIZED
00006200 00000048 F2837xS_GlobalVariableDefs.obj (UppRegsFile)
WdRegsFile
* 1 00007000 0000002b UNINITIALIZED
00007000 0000002b F2837xS_GlobalVariableDefs.obj (WdRegsFile)
NmiIntruptRegsFile
* 1 00007060 00000007 UNINITIALIZED
00007060 00000007 F2837xS_GlobalVariableDefs.obj (NmiIntruptRegsFile)
XintRegsFile
* 1 00007070 0000000b UNINITIALIZED
00007070 0000000b F2837xS_GlobalVariableDefs.obj (XintRegsFile)
SciaRegsFile
* 1 00007200 00000010 UNINITIALIZED
00007200 00000010 F2837xS_GlobalVariableDefs.obj (SciaRegsFile)
ScibRegsFile
* 1 00007210 00000010 UNINITIALIZED
00007210 00000010 F2837xS_GlobalVariableDefs.obj (ScibRegsFile)
ScicRegsFile
* 1 00007220 00000010 UNINITIALIZED
00007220 00000010 F2837xS_GlobalVariableDefs.obj (ScicRegsFile)
ScidRegsFile
* 1 00007230 00000010 UNINITIALIZED
00007230 00000010 F2837xS_GlobalVariableDefs.obj (ScidRegsFile)
I2caRegsFile
* 1 00007300 00000022 UNINITIALIZED
00007300 00000022 F2837xS_GlobalVariableDefs.obj (I2caRegsFile)
I2cbRegsFile
* 1 00007340 00000022 UNINITIALIZED
00007340 00000022 F2837xS_GlobalVariableDefs.obj (I2cbRegsFile)
InputXbarRegsFile
* 1 00007900 00000020 UNINITIALIZED
00007900 00000020 F2837xS_GlobalVariableDefs.obj (InputXbarRegsFile)
XbarRegsFile
* 1 00007920 00000020 UNINITIALIZED
00007920 00000020 F2837xS_GlobalVariableDefs.obj (XbarRegsFile)
SyncSocRegsFile
* 1 00007940 00000006 UNINITIALIZED
00007940 00000006 F2837xS_GlobalVariableDefs.obj (SyncSocRegsFile)
DmaClaSrcSelRegsFile
* 1 00007980 0000001a UNINITIALIZED
00007980 0000001a F2837xS_GlobalVariableDefs.obj (DmaClaSrcSelRegsFile)
EPwmXbarRegsFile
* 1 00007a00 00000040 UNINITIALIZED
00007a00 00000040 F2837xS_GlobalVariableDefs.obj (EPwmXbarRegsFile)
OutputXbarRegsFile
* 1 00007a80 00000040 UNINITIALIZED
00007a80 00000040 F2837xS_GlobalVariableDefs.obj (OutputXbarRegsFile)
GpioCtrlRegsFile
* 1 00007c00 00000180 UNINITIALIZED
00007c00 00000180 F2837xS_GlobalVariableDefs.obj (GpioCtrlRegsFile)
GpioDataRegsFile
* 1 00007f00 00000030 UNINITIALIZED
00007f00 00000030 F2837xS_GlobalVariableDefs.obj (GpioDataRegsFile)
.ebss 1 0000ac00 000003f6 UNINITIALIZED
0000ac00 00000208 serialUART.obj (.ebss)
0000ae08 0000001a adc.obj (.ebss)
0000ae22 00000012 dac.obj (.ebss)
0000ae34 00000008 rts2800_fpu32.lib : memory.obj (.ebss)
0000ae3c 00000002 ADCSource.obj (.ebss)
0000ae3e 00000002 ThreePhsSysCoordinator.obj (.ebss)
0000ae40 000001a0 epwm_trip_zone.obj (.ebss)
0000afe0 00000006 rts2800_fpu32.lib : exit.obj (.ebss)
0000afe6 00000005 IOExpander.obj (.ebss)
0000afeb 00000002 UARTsrcSnk.obj (.ebss)
0000afed 00000001 F2837xS_DefaultISR.obj (.ebss)
0000afee 00000002 rts2800_fpu32.lib : _lock.obj (.ebss:__lock)
0000aff0 00000002 : _lock.obj (.ebss:__unlock)
0000aff2 00000002 : vars.obj (.ebss)
0000aff4 00000001 ThreePhsSysInput.obj (.ebss)
0000aff5 00000001 ThreePhsSysOutput.obj (.ebss)
Emif1RegsFile
* 1 00047000 00000070 UNINITIALIZED
00047000 00000070 F2837xS_GlobalVariableDefs.obj (Emif1RegsFile)
Emif2RegsFile
* 1 00047800 00000070 UNINITIALIZED
00047800 00000070 F2837xS_GlobalVariableDefs.obj (Emif2RegsFile)
FlashPumpSemaphoreRegsFile
* 1 00050024 00000002 UNINITIALIZED
00050024 00000002 F2837xS_GlobalVariableDefs.obj (FlashPumpSemaphoreRegsFile)
DevCfgRegsFile
* 1 0005d000 0000012e UNINITIALIZED
0005d000 0000012e F2837xS_GlobalVariableDefs.obj (DevCfgRegsFile)
ClkCfgRegsFile
* 1 0005d200 00000032 UNINITIALIZED
0005d200 00000032 F2837xS_GlobalVariableDefs.obj (ClkCfgRegsFile)
CpuSysRegsFile
* 1 0005d300 00000082 UNINITIALIZED
0005d300 00000082 F2837xS_GlobalVariableDefs.obj (CpuSysRegsFile)
RomPrefetchRegsFile
* 1 0005e608 00000002 UNINITIALIZED
0005e608 00000002 F2837xS_GlobalVariableDefs.obj (RomPrefetchRegsFile)
DcsmZ1RegsFile
* 1 0005f000 00000024 UNINITIALIZED
0005f000 00000024 F2837xS_GlobalVariableDefs.obj (DcsmZ1RegsFile)
DcsmZ2RegsFile
* 1 0005f040 00000024 UNINITIALIZED
0005f040 00000024 F2837xS_GlobalVariableDefs.obj (DcsmZ2RegsFile)
DcsmCommonRegsFile
* 1 0005f070 00000008 UNINITIALIZED
0005f070 00000008 F2837xS_GlobalVariableDefs.obj (DcsmCommonRegsFile)
MemCfgRegsFile
* 1 0005f400 00000080 UNINITIALIZED
0005f400 00000080 F2837xS_GlobalVariableDefs.obj (MemCfgRegsFile)
Emif1ConfigRegsFile
* 1 0005f480 00000020 UNINITIALIZED
0005f480 00000020 F2837xS_GlobalVariableDefs.obj (Emif1ConfigRegsFile)
Emif2ConfigRegsFile
* 1 0005f4a0 00000020 UNINITIALIZED
0005f4a0 00000020 F2837xS_GlobalVariableDefs.obj (Emif2ConfigRegsFile)
AccessProtectionRegsFile
* 1 0005f4c0 00000040 UNINITIALIZED
0005f4c0 00000040 F2837xS_GlobalVariableDefs.obj (AccessProtectionRegsFile)
MemoryErrorRegsFile
* 1 0005f500 00000040 UNINITIALIZED
0005f500 00000040 F2837xS_GlobalVariableDefs.obj (MemoryErrorRegsFile)
RomWaitStateRegsFile
* 1 0005f540 00000002 UNINITIALIZED
0005f540 00000002 F2837xS_GlobalVariableDefs.obj (RomWaitStateRegsFile)
Flash0CtrlRegsFile
* 1 0005f800 00000182 UNINITIALIZED
0005f800 00000182 F2837xS_GlobalVariableDefs.obj (Flash0CtrlRegsFile)
Flash0EccRegsFile
* 1 0005fb00 00000028 UNINITIALIZED
0005fb00 00000028 F2837xS_GlobalVariableDefs.obj (Flash0EccRegsFile)
Flash1CtrlRegsFile
* 1 0005fc00 00000182 UNINITIALIZED
0005fc00 00000182 F2837xS_GlobalVariableDefs.obj (Flash1CtrlRegsFile)
Flash1EccRegsFile
* 1 0005ff00 00000028 UNINITIALIZED
0005ff00 00000028 F2837xS_GlobalVariableDefs.obj (Flash1EccRegsFile)
DcsmZ1OtpFile
* 1 00078000 00000020 NOLOAD SECTION
00078000 00000020 F2837xS_GlobalVariableDefs.obj (DcsmZ1OtpFile)
DcsmZ2OtpFile
* 1 00078200 00000020 NOLOAD SECTION
00078200 00000020 F2837xS_GlobalVariableDefs.obj (DcsmZ2OtpFile)
MODULE SUMMARY
Module code ro data rw data
------ ---- ------- -------
.\
F2837xS_GlobalVariableDefs.obj 0 0 8437
epwm_trip_zone.obj 1585 0 456
F2837xS_DefaultISR.obj 1423 0 5
F2837xS_SysCtrl.obj 1188 0 0
F2837xS_Gpio.obj 468 0 0
F2837xS_PieVect.obj 17 0 448
F2837xS_Adc.obj 212 0 0
F2837xS_PieCtrl.obj 40 0 0
F2837xS_usDelay.obj 8 0 0
F2837xS_CodeStartBranch.obj 2 0 0
+--+--------------------------------+-------+---------+---------+
Total: 4943 0 9346
.\Classes\
UARTsrcSnk.obj 1180 0 10
serialUART.obj 311 0 540
ADCSource.obj 578 0 18
Transform.obj 406 0 8
dac.obj 316 0 75
PWMsink.obj 366 0 8
ThreePhaseBase.obj 362 0 8
ThreePhsSysInput.obj 86 0 249
adc.obj 203 0 30
IOExpander.obj 219 0 13
DACSink.obj 164 0 8
ThreePhsSysCoordinator.obj 150 0 10
ThreePhsSysOutput.obj 146 0 9
OnePhaseBase.obj 121 0 8
EXTADC.obj 94 0 8
EXTADCMAX11605.obj 88 0 8
SysCommons.obj 71 0 8
OnePhsSysInput.obj 35 0 8
+--+--------------------------------+-------+---------+---------+
Total: 4896 0 1026
C:/ti/ccsv6/tools/compiler/c2000_15.12.3.LTS/lib/rts2800_fpu32.lib
memory.obj 466 0 12
fs_div.obj 136 0 0
boot.obj 86 0 0
cpy_tbl.obj 70 0 0
exit.obj 41 0 20
i_div.obj 34 0 0
new_.obj 32 0 0
memcpy.obj 30 0 0
cpy_utils.obj 26 0 0
args_main.obj 25 0 0
_lock.obj 9 0 14
vars.obj 0 0 7
delete.obj 5 0 0
pre_init.obj 2 0 0
newhandler.obj 1 0 0
startup.obj 1 0 0
+--+--------------------------------+-------+---------+---------+
Total: 964 0 53
Heap: 0 0 1024
Stack: 0 0 256
+--+--------------------------------+-------+---------+---------+
Grand Total: 10803 0 11705
GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
address data page name
-------- ---------------- ----
00000400 10 (00000400) __stack
00000b00 2c (00000b00) _AdcaResultRegs
00000b20 2c (00000b00) _AdcbResultRegs
00000b40 2d (00000b40) _AdccResultRegs
00000b60 2d (00000b40) _AdcdResultRegs
00000c00 30 (00000c00) _CpuTimer0Regs
00000c08 30 (00000c00) _CpuTimer1Regs
00000c10 30 (00000c00) _CpuTimer2Regs
00000ce0 33 (00000cc0) _Cla1SoftIntRegs
00000ce0 33 (00000cc0) _PieCtrlRegs
00000d00 34 (00000d00) _EmuKey
00000d00 34 (00000d00) _PieVectTable
00000d01 34 (00000d00) _EmuBMode
00001000 40 (00001000) _DmaRegs
00001400 50 (00001400) _Cla1Regs
00004000 100 (00004000) _EPwm1Regs
00004100 104 (00004100) _EPwm2Regs
00004200 108 (00004200) _EPwm3Regs
00004300 10c (00004300) _EPwm4Regs
00004400 110 (00004400) _EPwm5Regs
00004500 114 (00004500) _EPwm6Regs
00004600 118 (00004600) _EPwm7Regs
00004700 11c (00004700) _EPwm8Regs
00004800 120 (00004800) _EPwm9Regs
00004900 124 (00004900) _EPwm10Regs
00004a00 128 (00004a00) _EPwm11Regs
00004b00 12c (00004b00) _EPwm12Regs
00005000 140 (00005000) _ECap1Regs
00005020 140 (00005000) _ECap2Regs
00005040 141 (00005040) _ECap3Regs
00005060 141 (00005040) _ECap4Regs
00005080 142 (00005080) _ECap5Regs
000050a0 142 (00005080) _ECap6Regs
00005100 144 (00005100) _EQep1Regs
00005140 145 (00005140) _EQep2Regs
00005180 146 (00005180) _EQep3Regs
00005c00 170 (00005c00) _DacaRegs
00005c10 170 (00005c00) _DacbRegs
00005c20 170 (00005c00) _DaccRegs
00005c80 172 (00005c80) _Cmpss1Regs
00005ca0 172 (00005c80) _Cmpss2Regs
00005cc0 173 (00005cc0) _Cmpss3Regs
00005ce0 173 (00005cc0) _Cmpss4Regs
00005d00 174 (00005d00) _Cmpss5Regs
00005d20 174 (00005d00) _Cmpss6Regs
00005d40 175 (00005d40) _Cmpss7Regs
00005d60 175 (00005d40) _Cmpss8Regs
00005e00 178 (00005e00) _Sdfm1Regs
00005e80 17a (00005e80) _Sdfm2Regs
00006000 180 (00006000) _McbspaRegs
00006040 181 (00006040) _McbspbRegs
00006100 184 (00006100) _SpiaRegs
00006110 184 (00006100) _SpibRegs
00006120 184 (00006100) _SpicRegs
00006200 188 (00006200) _UppRegs
00007000 1c0 (00007000) _WdRegs
00007060 1c1 (00007040) _NmiIntruptRegs
00007070 1c1 (00007040) _XintRegs
00007200 1c8 (00007200) _SciaRegs
00007210 1c8 (00007200) _ScibRegs
00007220 1c8 (00007200) _ScicRegs
00007230 1c8 (00007200) _ScidRegs
00007300 1cc (00007300) _I2caRegs
00007340 1cd (00007340) _I2cbRegs
00007400 1d0 (00007400) _AdcaRegs
00007480 1d2 (00007480) _AdcbRegs
00007500 1d4 (00007500) _AdccRegs
00007580 1d6 (00007580) _AdcdRegs
00007900 1e4 (00007900) _InputXbarRegs
00007920 1e4 (00007900) _XbarRegs
00007940 1e5 (00007940) _SyncSocRegs
00007980 1e6 (00007980) _DmaClaSrcSelRegs
00007a00 1e8 (00007a00) _EPwmXbarRegs
00007a80 1ea (00007a80) _OutputXbarRegs
00007c00 1f0 (00007c00) _GpioCtrlRegs
00007f00 1fc (00007f00) _GpioDataRegs
0000a800 2a0 (0000a800) __sys_memory
0000ac00 2b0 (0000ac00) _writeHead
0000ac01 2b0 (0000ac00) _writeTail
0000ac02 2b0 (0000ac00) _readTail
0000ac03 2b0 (0000ac00) _readHead
0000ac04 2b0 (0000ac00) _uartActive
0000ac40 2b1 (0000ac40) _RxRingBuffer
0000ad40 2b5 (0000ad40) _TxRingBuffer
0000ae08 2b8 (0000ae00) _adcACycle
0000ae09 2b8 (0000ae00) _currentGroup
0000ae0a 2b8 (0000ae00) _adc_I
0000ae16 2b8 (0000ae00) _adc_U
0000ae22 2b8 (0000ae00) _dacSel
0000ae23 2b8 (0000ae00) _dacChnlLoctr
0000ae24 2b8 (0000ae00) _currentDACgrp
0000ae25 2b8 (0000ae00) _fakeDacVal
0000ae26 2b8 (0000ae00) _wordHalf
0000ae2a 2b8 (0000ae00) _i_Set
0000ae2f 2b8 (0000ae00) _i_Band
0000ae41 2b9 (0000ae40) _intFlag
0000ae43 2b9 (0000ae40) _aOs
0000ae4f 2b9 (0000ae40) _slowBlink
0000ae54 2b9 (0000ae40) _tPsCptr
0000ae56 2b9 (0000ae40) _isl
0000ae58 2b9 (0000ae40) _portPtrOut
0000ae5a 2b9 (0000ae40) _grid
0000ae5c 2b9 (0000ae40) _bat
0000ae5e 2b9 (0000ae40) _p1
0000ae60 2b9 (0000ae40) _di
0000ae62 2b9 (0000ae40) _p2
0000ae64 2b9 (0000ae40) _ioE
0000ae66 2b9 (0000ae40) _extDacPtr
0000ae68 2b9 (0000ae40) _extAdcPtr
0000ae6c 2b9 (0000ae40) _extAdc11605Ptr
0000ae6e 2b9 (0000ae40) _ioEIso
0000ae70 2b9 (0000ae40) _portPtrIn
0000ae72 2b9 (0000ae40) _portPtrInIso
0000ae74 2b9 (0000ae40) _portPtrOutIso
0000ae76 2b9 (0000ae40) _ePwm_Regs_Ptr_1
0000ae78 2b9 (0000ae40) _ePwm_Regs_Ptr_2
0000ae7a 2b9 (0000ae40) _urtPtr
0000ae7c 2b9 (0000ae40) _adcSptr
0000ae7e 2b9 (0000ae40) _dacSptr
0000ae80 2ba (0000ae80) _EPwm2TZIntCount
0000ae82 2ba (0000ae80) _EPwm1TZIntCount
0000ae84 2ba (0000ae80) _ports
0000ae89 2ba (0000ae80) _portsIn
0000ae8e 2ba (0000ae80) _extDacVals
0000ae96 2ba (0000ae80) _CpuTimer0
0000ae9e 2ba (0000ae80) _adcDummy
0000aea6 2ba (0000ae80) _modFrame
0000aec0 2bb (0000aec0) _extAdcVals
0000aed0 2bb (0000aec0) _extAdc_11605_Vals
0000aee0 2bb (0000aec0) _fO
0000af00 2bc (0000af00) _str
0000af40 2bd (0000af40) _inputVector
0000afe0 2bf (0000afc0) ___TI_enable_exit_profile_output
0000afe2 2bf (0000afc0) ___TI_cleanup_ptr
0000afe4 2bf (0000afc0) ___TI_dtors_ptr
0000afee 2bf (0000afc0) __lock
0000aff0 2bf (0000afc0) __unlock
0000aff2 2bf (0000afc0) __new_handler
0000aff4 2bf (0000afc0) _time
00047000 11c0 (00047000) _Emif1Regs
00047800 11e0 (00047800) _Emif2Regs
00050024 1400 (00050000) _FlashPumpSemaphoreRegs
0005d000 1740 (0005d000) _DevCfgRegs
0005d180 1746 (0005d180) _AnalogSubsysRegs
0005d200 1748 (0005d200) _ClkCfgRegs
0005d300 174c (0005d300) _CpuSysRegs
0005e608 1798 (0005e600) _RomPrefetchRegs
0005f000 17c0 (0005f000) _DcsmZ1Regs
0005f040 17c1 (0005f040) _DcsmZ2Regs
0005f070 17c1 (0005f040) _DcsmCommonRegs
0005f400 17d0 (0005f400) _MemCfgRegs
0005f480 17d2 (0005f480) _Emif1ConfigRegs
0005f4a0 17d2 (0005f480) _Emif2ConfigRegs
0005f4c0 17d3 (0005f4c0) _AccessProtectionRegs
0005f500 17d4 (0005f500) _MemoryErrorRegs
0005f540 17d5 (0005f540) _RomWaitStateRegs
0005f800 17e0 (0005f800) _Flash0CtrlRegs
0005fb00 17ec (0005fb00) _Flash0EccRegs
0005fc00 17f0 (0005fc00) _Flash1CtrlRegs
0005ff00 17fc (0005ff00) _Flash1EccRegs
00078000 1e00 (00078000) _DcsmZ1Otp
00078200 1e08 (00078200) _DcsmZ2Otp
00090000 2400 (00090000) _PieVectTableInit
000902b0 240a (00090280) ___vtbl__10ADC_Source
000902b8 240a (00090280) ___vtbl__10SysCommons
000902c0 240b (000902c0) ___vtbl__10UARTsrcSnk
000902c8 240b (000902c0) ___vtbl__11IO_Expander
000902d0 240b (000902c0) ___vtbl__12OnePhaseBase
000902d8 240b (000902c0) ___vtbl__14OnePhsSysInput
000902e0 240b (000902c0) ___vtbl__14ThreePhaseBase
000902e8 240b (000902c0) ___vtbl__16EXT_ADC_MAX11605
000902f0 240b (000902c0) ___vtbl__16ThreePhsSysInput
000902f8 240b (000902c0) ___vtbl__17ThreePhsSysOutput
00090300 240c (00090300) ___vtbl__22ThreePhsSysCoordinator
00090308 240c (00090300) ___vtbl__7DACSink
00090310 240c (00090300) ___vtbl__7EXT_ADC
00090318 240c (00090300) ___vtbl__7PWMsink
00090320 240c (00090300) ___vtbl__9Transform
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
page address name
---- ------- ----
abs ffffffff .text
0 00083fbb C$$EXIT
0 000845c5 FS$$DIV
0 00084900 I$$DIV
0 00084911 I$$MOD
0 0008262d _ADCA1_ISR
0 00082623 _ADCA2_ISR
0 00082619 _ADCA3_ISR
0 0008260f _ADCA4_ISR
0 00082605 _ADCA_EVT_ISR
0 000825f1 _ADCB1_ISR
0 000825e7 _ADCB2_ISR
0 000825dd _ADCB3_ISR
0 000825d3 _ADCB4_ISR
0 000825c9 _ADCB_EVT_ISR
0 000825bf _ADCC1_ISR
0 000825b5 _ADCC2_ISR
0 000825ab _ADCC3_ISR
0 000825a1 _ADCC4_ISR
0 00082597 _ADCC_EVT_ISR
0 0008258d _ADCD1_ISR
0 00082583 _ADCD2_ISR
0 00082579 _ADCD3_ISR
0 0008256f _ADCD4_ISR
0 00082565 _ADCD_EVT_ISR
0 0008255b _AUX_PLL_SLIP_ISR
1 0005f4c0 _AccessProtectionRegs
0 00084035 _AdcSetMode
1 00007400 _AdcaRegs
1 00000b00 _AdcaResultRegs
1 00007480 _AdcbRegs
1 00000b20 _AdcbResultRegs
1 00007500 _AdccRegs
1 00000b40 _AdccResultRegs
1 00007580 _AdcdRegs
1 00000b60 _AdcdResultRegs
1 0005d180 _AnalogSubsysRegs
0 00082f9c _AreFramesAvail__10UARTsrcSnkFv
0 000831c7 _AuxAuxClkSel
0 000831e2 _AuxIntOsc2Sel
0 000831d1 _AuxXtalOscSel
0 00082551 _CANA0_ISR
0 00082547 _CANA1_ISR
0 0008253d _CANB0_ISR
0 00082533 _CANB1_ISR
0 00082529 _CLA1_1_ISR
0 0008251f _CLA1_2_ISR
0 00082515 _CLA1_3_ISR
0 0008250b _CLA1_4_ISR
0 00082501 _CLA1_5_ISR
0 000824f7 _CLA1_6_ISR
0 000824ed _CLA1_7_ISR
0 000824e3 _CLA1_8_ISR
0 000824d9 _CLA_OVERFLOW_ISR
0 000824cf _CLA_UNDERFLOW_ISR
0 00084000 _CalAdcINL
0 0008485b _CalcCurrentPercentFromAdcDigits__10SysCommonsFUi
0 000839b3 _CalcCurrentPhase__9TransformFdN21
0 00082c58 _CalcLRC__10UARTsrcSnkFv
0 00083d5f _CalcSinPwm__14ThreePhaseBaseFdT1
0 00083d43 _CalcSineFormEffFactor__14ThreePhaseBaseFiT1
0 00084845 _CalcVoltageFromAdcDigits__10SysCommonsFUi
0 00082db0 _CaptureWrap__10UARTsrcSnkFUi
0 00082f9a _CheckParityWord__10UARTsrcSnkFUi
1 00001400 _Cla1Regs
0 00000ce0 _Cla1SoftIntRegs
0 00083fba _ClearPin__11IO_ExpanderFUiT1
1 0005d200 _ClkCfgRegs
0 000844a4 _CloseGridCon__22ThreePhsSysCoordinatorFv
0 0008449f _ClosePV1_N__22ThreePhsSysCoordinatorFv
0 0008449a _ClosePV1_PN__22ThreePhsSysCoordinatorFv
0 00084495 _ClosePV1_P__22ThreePhsSysCoordinatorFv
0 00084490 _ClosePreLoadZwKrs__22ThreePhsSysCoordinatorFv
1 00005c80 _Cmpss1Regs
1 00005ca0 _Cmpss2Regs
1 00005cc0 _Cmpss3Regs
1 00005ce0 _Cmpss4Regs
1 00005d00 _Cmpss5Regs
1 00005d20 _Cmpss6Regs
1 00005d40 _Cmpss7Regs
1 00005d60 _Cmpss8Regs
1 0005d300 _CpuSysRegs
1 0000ae96 _CpuTimer0
1 00000c00 _CpuTimer0Regs
1 00000c08 _CpuTimer1Regs
1 00000c10 _CpuTimer2Regs
0 000844cc _CreateThrePhseSine__17ThreePhsSysOutputFdi
0 00083306 _CsmUnlock
0 000824c5 _DATALOG_ISR
0 000824bb _DMA_CH1_ISR
0 000824b1 _DMA_CH2_ISR
0 000824a7 _DMA_CH3_ISR
0 0008249d _DMA_CH4_ISR
0 00082493 _DMA_CH5_ISR
0 00082489 _DMA_CH6_ISR
1 00005c00 _DacaRegs
1 00005c10 _DacbRegs
1 00005c20 _DaccRegs
1 0005f070 _DcsmCommonRegs
1 00078000 _DcsmZ1Otp
1 0005f000 _DcsmZ1Regs
1 00078200 _DcsmZ2Otp
1 0005f040 _DcsmZ2Regs
0 000839d9 _Derive__9TransformFd
1 0005d000 _DevCfgRegs
0 000830c9 _DisableDog
0 000832c4 _DisablePeripheralClocks
1 00007980 _DmaClaSrcSelRegs
1 00001000 _DmaRegs
0 0008247f _ECAP1_ISR
0 00082475 _ECAP2_ISR
0 0008246b _ECAP3_ISR
0 00082461 _ECAP4_ISR
0 00082457 _ECAP5_ISR
0 0008244d _ECAP6_ISR
1 00005000 _ECap1Regs
1 00005020 _ECap2Regs
1 00005040 _ECap3Regs
1 00005060 _ECap4Regs
1 00005080 _ECap5Regs
1 000050a0 _ECap6Regs
0 00082443 _EMIF_ERROR_ISR
0 00082436 _EMPTY_ISR
0 0008242c _EMU_ISR
0 00082422 _EPWM10_ISR
0 00082418 _EPWM10_TZ_ISR
0 0008240e _EPWM11_ISR
0 00082404 _EPWM11_TZ_ISR
0 000823fa _EPWM12_ISR
0 000823f0 _EPWM12_TZ_ISR
0 000823e6 _EPWM1_ISR
0 000823dc _EPWM1_TZ_ISR
0 000823d2 _EPWM2_ISR
0 000823c8 _EPWM2_TZ_ISR
0 000823be _EPWM3_ISR
0 000823b4 _EPWM3_TZ_ISR
0 000823aa _EPWM4_ISR
0 000823a0 _EPWM4_TZ_ISR
0 00082396 _EPWM5_ISR
0 0008238c _EPWM5_TZ_ISR
0 00082382 _EPWM6_ISR
0 00082378 _EPWM6_TZ_ISR
0 0008236e _EPWM7_ISR
0 00082364 _EPWM7_TZ_ISR
0 0008235a _EPWM8_ISR
0 00082350 _EPWM8_TZ_ISR
0 00082346 _EPWM9_ISR
0 0008233c _EPWM9_TZ_ISR
1 00004900 _EPwm10Regs
1 00004a00 _EPwm11Regs
1 00004b00 _EPwm12Regs
1 00004000 _EPwm1Regs
1 0000ae82 _EPwm1TZIntCount
1 00004100 _EPwm2Regs
1 0000ae80 _EPwm2TZIntCount
1 00004200 _EPwm3Regs
1 00004300 _EPwm4Regs
1 00004400 _EPwm5Regs
1 00004500 _EPwm6Regs
1 00004600 _EPwm7Regs
1 00004700 _EPwm8Regs
1 00004800 _EPwm9Regs
1 00007a00 _EPwmXbarRegs
0 00082332 _EQEP1_ISR
0 00082328 _EQEP2_ISR
0 0008231e _EQEP3_ISR
1 00005100 _EQep1Regs
1 00005140 _EQep2Regs
1 00005180 _EQep3Regs
1 0005f480 _Emif1ConfigRegs
1 00047000 _Emif1Regs
1 0005f4a0 _Emif2ConfigRegs
1 00047800 _Emif2Regs
1 00000d01 _EmuBMode
1 00000d00 _EmuKey
0 000848d4 _EnableInterrupts
0 00008090 _F28x_usDelay
0 00082314 _FLASH_CORRECTABLE_ERROR_ISR
0 0008230a _FPU_OVERFLOW_ISR
0 00082300 _FPU_UNDERFLOW_ISR
0 00082f86 _FeedAnalogVals__10UARTsrcSnkFiUi
0 00082f72 _FeedBitCodedVals__10UARTsrcSnkFUcUi
0 00082ad0 _FillValsToString__FPUiPUcl
0 00083f98 _FinishReadDevice2__11IO_ExpanderFv
0 00083f91 _FinishReadDevice__11IO_ExpanderFv
0 00084775 _FinishReadDevice__16EXT_ADC_MAX11605Fv
0 0008471d _FinishReadDevice__7EXT_ADCFv
1 0005f800 _Flash0CtrlRegs
1 0005fb00 _Flash0EccRegs
1 0005fc00 _Flash1CtrlRegs
1 0005ff00 _Flash1EccRegs
0 0000807c _FlashOff_Bank0
0 00008068 _FlashOff_Bank1
1 00050024 _FlashPumpSemaphoreRegs
0 00082dc2 _FourAscsToInt16__10UARTsrcSnkFP18int16ToModHexStrct
0 0008372d _GPIO_EnableUnbondedIOPullups
0 00083708 _GPIO_EnableUnbondedIOPullupsFor100Pin
0 000836ef _GPIO_EnableUnbondedIOPullupsFor176Pin
0 000836db _GPIO_ReadPin
0 000836b9 _GPIO_SetupLock
0 00083664 _GPIO_SetupPinMux
0 000835dd _GPIO_SetupPinOptions
0 000835d6 _GPIO_SetupXINT1Gpio
0 000835cf _GPIO_SetupXINT2Gpio
0 000835c8 _GPIO_SetupXINT3Gpio
0 000835c1 _GPIO_SetupXINT4Gpio
0 000835ba _GPIO_SetupXINT5Gpio
0 000835a0 _GPIO_WritePin
0 00082da7 _GetAmtOfRxBytes__10UARTsrcSnkFUiT1
0 00082f6f _GetFC__10UARTsrcSnkFv
0 000846c2 _GetI__12OnePhaseBaseFv
0 00083d40 _GetI__14ThreePhaseBaseFUi
0 00083f8b _GetInPort__11IO_ExpanderFUi
0 00084842 _GetNegZwKrsRawVal__10SysCommonsFv
0 00083c09 _GetNextPWMregRef__7PWMsinkFv
0 000839fe _GetNextPhaseVal__9TransformFdN21
0 0008355e _GetNxtAdcIref__10ADC_SourceFv
0 00083553 _GetNxtAdcUref__10ADC_SourceFv
0 00082f6e _GetNxtFrame__10UARTsrcSnkFv
0 00083f6d _GetNxtPin__11IO_ExpanderFPPUiPUi
0 000842d1 _GetNxt_i_Band__7DACSinkFv
0 000842c6 _GetNxt_i_Set__7DACSinkFv
0 00083f67 _GetOutPort__11IO_ExpanderFUi
0 00083c02 _GetPWMregRef__7PWMsinkFUi
0 0008483f _GetPosZwKrsRawVal__10SysCommonsFv
0 000846bf _GetPwmRegRef__12OnePhaseBaseFv
0 00083d38 _GetPwmRegRef__14ThreePhaseBaseFUi
0 00082f4c _GetRecVal__10UARTsrcSnkFv
0 0008476b _GetSpecChnl__16EXT_ADC_MAX11605FUi
0 00084713 _GetSpecChnl__7EXT_ADCFUi
0 00083f5c _GetSpecPin__11IO_ExpanderFPPUiPUi
0 000842bf _GetSpec_i_Band__7DACSinkFUi
0 000842b8 _GetSpec_i_Set__7DACSinkFUi
0 00083548 _GetSpecificAdcIref__10ADC_SourceFUi
0 0008353d _GetSpecificAdcUref__10ADC_SourceFUi
0 00082f49 _GetStartAdr__10UARTsrcSnkFv
0 000846b4 _GetU__12OnePhaseBaseFv
0 00083d30 _GetU__14ThreePhaseBaseFUi
0 0008448e _GetZwKrsPreLoadPin__22ThreePhsSysCoordinatorFv
0 0008448c _GetZwKrsPreLoadPort__22ThreePhsSysCoordinatorFv
0 000846a6 _GetZwKrsU__12OnePhaseBaseFv
1 00007c00 _GpioCtrlRegs
1 00007f00 _GpioDataRegs
0 000832f5 _HALT
0 000832e1 _HIB
0 00082dba _HexAsciToDecNibble__10UARTsrcSnkFUc
0 000822f6 _I2CA_FIFO_ISR
0 000822ec _I2CA_ISR
0 000822e2 _I2CB_FIFO_ISR
0 000822d8 _I2CB_ISR
1 00007300 _I2caRegs
1 00007340 _I2cbRegs
0 000832bb _IDLE
0 000822ce _ILLEGAL_ISR
0 000822c4 _IPC0_ISR
0 000822ba _IPC1_ISR
0 000822b0 _IPC2_ISR
0 000822a6 _IPC3_ISR
0 0008332f _InitAdc__10ADC_SourceFv
0 000831ef _InitAuxPll
0 00083aad _InitEPWMmodules__7PWMsinkFv
0 00082a99 _InitEPwm1Example__Fv
0 00082a5d _InitEPwm2Example__Fv
0 00082a41 _InitEPwmGpio_TZ__Fv
0 00008000 _InitFlash_Bank0
0 00008034 _InitFlash_Bank1
0 00083569 _InitGpio
0 000830d6 _InitPeripheralClocks
0 000848b5 _InitPieCtrl
0 00084992 _InitPieVectTable
0 0008317f _InitSysCtrl
0 0008300a _InitSysPll
0 00082638 _InitTimer_0__Fv
0 00082a40 _InitTzGpio__Fv
0 00082b0f _InitUART__10UARTsrcSnkFv
0 00082a1b _Init_I2C__Fv
0 00084240 _Init__7DACSinkFv
1 00007900 _InputXbarRegs
0 00082c32 _Int16To4hexAsciis__10UARTsrcSnkFP18int16ToModHexStrct
0 0008398e _Integrator__9TransformFd
0 000847cc _IsPhaseLocked__16ThreePhsSysInputFv
0 00083988 _IsPllSynced__9TransformFv
0 0008229c _MCBSPA_RX_ISR
0 00082292 _MCBSPA_TX_ISR
0 00082288 _MCBSPB_RX_ISR
0 0008227e _MCBSPB_TX_ISR
1 00006000 _McbspaRegs
1 00006040 _McbspbRegs
1 0005f400 _MemCfgRegs
1 0005f500 _MemoryErrorRegs
0 00082dd8 _ModToApp_ConvertAndCheckFC1toFC4__10UARTsrcSnkFPUcUiPi
0 00083961 _MovAvrg__9TransformFd
0 00082274 _NMI_ISR
0 0008226a _NOTUSED_ISR
0 00082c2a _NibbleToHexAscii__10UARTsrcSnkFUc
1 00007060 _NmiIntruptRegs
0 00083917 _NullMovAvrg__9TransformFv
0 00084487 _OpenGridCon__22ThreePhsSysCoordinatorFv
0 00084482 _OpenPV1_N__22ThreePhsSysCoordinatorFv
0 0008447d _OpenPV1_PN__22ThreePhsSysCoordinatorFv
0 00084478 _OpenPV1_P__22ThreePhsSysCoordinatorFv
0 00084473 _OpenPreLoadZwKrs__22ThreePhsSysCoordinatorFv
1 00007a80 _OutputXbarRegs
0 00082260 _PIE_RESERVED_ISR
0 0008395e _PLLcontroler__9TransformFdN21
1 00000ce0 _PieCtrlRegs
1 00000d00 _PieVectTable
0 00090000 _PieVectTableInit
0 00084407 _PutCharPhy
0 000843dc _PutCharsPhy
0 000846a2 _PutDAC_I_Band_Val__12OnePhaseBaseFUi
0 0008469f _PutDAC_I_Band__12OnePhaseBaseFPUi
0 0008468d _PutDAC_I_Set_Val__12OnePhaseBaseFi
0 0008468a _PutDAC_I_Set__12OnePhaseBaseFPUi
0 00083d25 _PutDACref__14ThreePhaseBaseFPUi
0 00083cfa _PutDACval__14ThreePhaseBaseFUii
0 00083ce7 _PutDutyCyclesToPwmRegs__14ThreePhaseBaseFUlN21
0 00084687 _PutIref__12OnePhaseBaseFPUi
0 00083cdc _PutIref__14ThreePhaseBaseFPUi
0 0008483d _PutNegZwKrsRef__10SysCommonsFPUi
0 00083cd1 _PutNxtPwmRegRef__14ThreePhaseBaseFPVUl
0 0008483b _PutPosZwKrsRef__10SysCommonsFPUi
0 00084684 _PutPwmRegRef__12OnePhaseBaseFPVUl
0 00084682 _PutUref__12OnePhaseBaseFPUi
0 00083cc7 _PutUref__14ThreePhaseBaseFPUi
0 00082256 _RAM_ACCESS_VIOLATION_ISR
0 0008224c _RAM_CORRECTABLE_ERROR_ISR
0 00082242 _RTOS_ISR
0 00086094 _RamfuncsLoadEnd
abs 00000094 _RamfuncsLoadSize
0 00086000 _RamfuncsLoadStart
0 00008094 _RamfuncsRunEnd
abs 00000094 _RamfuncsRunSize
0 00008000 _RamfuncsRunStart
0 00082e81 _ReadSerial__10UARTsrcSnkFv
0 00083000 _ReleaseFlashPump
0 00084402 _ResetTX
0 00082da4 _ResetTxPp__10UARTsrcSnkFv
1 0005e608 _RomPrefetchRegs
1 0005f540 _RomWaitStateRegs
0 00084443 _RunCoordinator__22ThreePhsSysCoordinatorFv
0 000847af _RunRefSys__16ThreePhsSysInputFv
0 00083c4e _RunRmsFilter__14ThreePhaseBaseFv
0 0008467a _Run__12OnePhaseBaseFv
0 0008434c _RxInt
1 0000ac40 _RxRingBuffer
0 00082238 _SCIA_RX_ISR
0 0008222e _SCIA_TX_ISR
0 00082224 _SCIB_RX_ISR
0 0008221a _SCIB_TX_ISR
0 00082210 _SCIC_RX_ISR
0 00082206 _SCIC_TX_ISR
0 000821fc _SCID_RX_ISR
0 000821f2 _SCID_TX_ISR
0 000821e8 _SD1_ISR
0 000821de _SD2_ISR
0 000821d4 _SPIA_RX_ISR
0 000821ca _SPIA_TX_ISR
0 000821c0 _SPIB_RX_ISR
0 000821b6 _SPIB_TX_ISR
0 000821ac _SPIC_RX_ISR
0 000821a2 _SPIC_TX_ISR
0 00082ff5 _STANDBY
0 00082198 _SYS_PLL_SLIP_ISR
1 00007200 _SciaRegs
1 00007210 _ScibRegs
1 00007220 _ScicRegs
1 00007230 _ScidRegs
1 00005e00 _Sdfm1Regs
1 00005e80 _Sdfm2Regs
0 00082fe3 _SeizeFlashPump_Bank0
0 00082fd1 _SeizeFlashPump_Bank1
0 00082d05 _SendAnalogModBusDatas__10UARTsrcSnkFUi
0 00082c64 _SendBitCodedModBusDatas__10UARTsrcSnkFUi
0 000843f6 _SendCharPhy
0 00082c27 _SendChar__10UARTsrcSnkFUc
0 000843f1 _SendCharsPhy
0 00082c23 _SendChars__10UARTsrcSnkFPUcUi
0 00082fc3 _ServiceDog
0 00084441 _SetMyInputSys__22ThreePhsSysCoordinatorFP16ThreePhsSysInput
0 0008443f _SetMyOutputSys__22ThreePhsSysCoordinatorFP17ThreePhsSysOutput
0 00083f5b _SetPin__11IO_ExpanderFUiT1
0 00084675 _SetPwm__12OnePhaseBaseFUi
0 0008443b _SetUsollOut__22ThreePhsSysCoordinatorFi
0 00082c18 _Sg16BitValToString__10UARTsrcSnkFlPUc
1 00006100 _SpiaRegs
1 00006110 _SpibRegs
1 00006120 _SpicRegs
0 00084960 _StartCon
0 0008353a _StartCycle__10ADC_SourceFv
0 000842b5 _StartCycle__7DACSinkFv
0 000845a5 _StartDACcycle
0 00083f50 _StartReadDevice__11IO_ExpanderFv
0 00084761 _StartReadDevice__16EXT_ADC_MAX11605Fv
0 00084709 _StartReadDevice__7EXT_ADCFv
0 0008438d _StartTrans
0 00082c15 _Start__10UARTsrcSnkFv
1 00007940 _SyncSocRegs
0 00082fb9 _SysIntOsc1Sel
0 00082faf _SysIntOsc2Sel
0 00082fa3 _SysXtalOscSel
0 0008218e _TIMER0_ISR
0 00082184 _TIMER1_ISR
0 0008217a _TIMER2_ISR
0 00084379 _TransfHwfifoToSwBuf
0 00084747 _TransferRes__16EXT_ADC_MAX11605Fv
0 000846e9 _TransferRes__7EXT_ADCFv
0 000842dc _TxInt
1 0000ad40 _TxRingBuffer
0 00082170 _UPPA_ISR
0 00082166 _USBA_ISR
0 0008215c _USER10_ISR
0 00082152 _USER11_ISR
0 00082148 _USER12_ISR
0 0008213e _USER1_ISR
0 00082134 _USER2_ISR
0 0008212a _USER3_ISR
0 00082120 _USER4_ISR
0 00082116 _USER5_ISR
0 0008210c _USER6_ISR
0 00082102 _USER7_ISR
0 000820f8 _USER8_ISR
0 000820ee _USER9_ISR
0 00082bac _Unsg16BitValToString__10UARTsrcSnkFUlPUc
1 00006200 _UppRegs
0 000820e4 _VCU_ISR
0 000820da _WAKE_ISR
1 00007000 _WdRegs
0 0008453b _WriteDACtoFIFO
0 00083f41 _WriteDevice__11IO_ExpanderFv
0 00083f2e _WritePort__11IO_ExpanderFUi
0 000820d0 _XINT1_ISR
0 000820c6 _XINT2_ISR
0 000820bc _XINT3_ISR
0 000820b2 _XINT4_ISR
0 000820a8 _XINT5_ISR
1 00007920 _XbarRegs
1 00007070 _XintRegs
1 00000500 __STACK_END
abs 00000100 __STACK_SIZE
abs 00000400 __SYSMEM_SIZE
1 0000afe2 ___TI_cleanup_ptr
1 0000afe4 ___TI_dtors_ptr
1 0000afe0 ___TI_enable_exit_profile_output
abs ffffffff ___TI_pprof_out_hndl
abs ffffffff ___TI_prof_data_size
abs ffffffff ___TI_prof_data_start
abs ffffffff ___binit__
abs ffffffff ___c_args__
0 00082000 ___cinit__
0 00083527 ___ct__10ADC_SourceFv
0 00084830 ___ct__10SysCommonsFv
0 00082b59 ___ct__10UARTsrcSnkFv
0 00083ee8 ___ct__11IO_ExpanderFUiUcN42
0 0008465e ___ct__12OnePhaseBaseFv
0 000848ee ___ct__14OnePhsSysInputFv
0 00083c25 ___ct__14ThreePhaseBaseFv
0 0008472c ___ct__16EXT_ADC_MAX11605FUc
0 00084793 ___ct__16ThreePhsSysInputFv
0 000844ba ___ct__17ThreePhsSysOutputFv
0 0008441b ___ct__22ThreePhsSysCoordinatorFv
0 000842a1 ___ct__7DACSinkFv
0 000846ce ___ct__7EXT_ADCFUc
0 00083bf3 ___ct__7PWMsinkFv
0 0008391f ___ct__9TransformFv
0 00082637 ___default_new_handler__Fv
0 000849ac ___dl__FPv
0 00083327 ___dt__10ADC_SourceFv
0 00084828 ___dt__10SysCommonsFv
0 00082b07 ___dt__10UARTsrcSnkFv
0 00083ee0 ___dt__11IO_ExpanderFv
0 0008464d ___dt__12OnePhaseBaseFv
0 000848dd ___dt__14OnePhsSysInputFv
0 00083c14 ___dt__14ThreePhaseBaseFv
0 00084724 ___dt__16EXT_ADC_MAX11605Fv
0 0008477c ___dt__16ThreePhsSysInputFv
0 000844a9 ___dt__17ThreePhsSysOutputFv
0 00084413 ___dt__22ThreePhsSysCoordinatorFv
0 00084238 ___dt__7DACSinkFv
0 000846c6 ___dt__7EXT_ADCFv
0 00083aa5 ___dt__7PWMsinkFv
0 0008390f ___dt__9TransformFv
abs ffffffff ___etext__
0 00084922 ___nw__FUl
abs ffffffff ___pinit__
abs ffffffff ___text__
0 000902b0 ___vtbl__10ADC_Source
0 000902b8 ___vtbl__10SysCommons
0 000902c0 ___vtbl__10UARTsrcSnk
0 000902c8 ___vtbl__11IO_Expander
0 000902d0 ___vtbl__12OnePhaseBase
0 000902d8 ___vtbl__14OnePhsSysInput
0 000902e0 ___vtbl__14ThreePhaseBase
0 000902e8 ___vtbl__16EXT_ADC_MAX11605
0 000902f0 ___vtbl__16ThreePhsSysInput
0 000902f8 ___vtbl__17ThreePhsSysOutput
0 00090300 ___vtbl__22ThreePhsSysCoordinator
0 00090308 ___vtbl__7DACSink
0 00090310 ___vtbl__7EXT_ADC
0 00090318 ___vtbl__7PWMsink
0 00090320 ___vtbl__9Transform
0 00084979 __args_main
1 0000afee __lock
1 0000aff2 __new_handler
0 000849ab __nop
0 000849a7 __register_lock
0 000849a3 __register_unlock
1 00000400 __stack
1 0000a800 __sys_memory
0 00083c13 __system_post_cinit
0 00083ffe __system_pre_init
1 0000aff0 __unlock
1 0000ae43 _aOs
0 00083fbb _abort
1 0000ae08 _adcACycle
0 000840d4 _adcAint
1 0000ae9e _adcDummy
1 0000ae7c _adcSptr
1 0000ae0a _adc_I
1 0000ae16 _adc_U
1 0000ae5c _bat
0 000847d2 _c_int00
0 000838f8 _calloc
0 000838f6 _chkheap
0 0008486f _copy_in
0 00083dd8 _cpu_timer0_isr__Fv
1 0000ae24 _currentDACgrp
1 0000ae09 _currentGroup
1 0000ae23 _dacChnlLoctr
1 0000ae22 _dacSel
1 0000ae7e _dacSptr
0 00083fe4 _ddcopy
1 0000ae60 _di
0 00083fe4 _dpcopy
1 0000ae76 _ePwm_Regs_Ptr_1
1 0000ae78 _ePwm_Regs_Ptr_2
0 00083dc2 _epwm1_tzint_isr__Fv
0 00083d7e _epwm2_tzint_isr__Fv
0 00083fbd _exit
1 0000ae6c _extAdc11605Ptr
1 0000ae68 _extAdcPtr
1 0000aec0 _extAdcVals
1 0000aed0 _extAdc_11605_Vals
1 0000ae66 _extDacPtr
1 0000ae8e _extDacVals
1 0000aee0 _fO
1 0000ae25 _fakeDacVal
0 0008373d _free
0 000838d8 _free_memory
0 000829f3 _genInputVector__FPfi
1 0000ae5a _grid
1 0000ae2f _i_Band
1 0000ae2a _i_Set
1 0000af40 _inputVector
1 0000ae41 _intFlag
1 0000ae64 _ioE
1 0000ae6e _ioEIso
1 0000ae56 _isl
0 00082674 _main
0 000837a6 _malloc
0 000838b6 _max_free
0 00084942 _memcpy
0 00083781 _minit
1 0000aea6 _modFrame
1 0000ae5e _p1
1 0000ae62 _p2
0 00083fe4 _pdcopy
1 0000ae70 _portPtrIn
1 0000ae72 _portPtrInIso
1 0000ae58 _portPtrOut
1 0000ae74 _portPtrOutIso
1 0000ae84 _ports
1 0000ae89 _portsIn
0 00083fe4 _ppcopy
1 0000ac03 _readHead
1 0000ac02 _readTail
0 00083804 _realloc
1 0000ae4f _slowBlink
0 00084186 _spiAint
1 0000af00 _str
1 0000ae54 _tPsCptr
1 0000aff4 _time
1 0000ac04 _uartActive
1 0000ae7a _urtPtr
1 0000ae26 _wordHalf
1 0000ac00 _writeHead
1 0000ac01 _writeTail
abs ffffffff binit
0 00082000 cinit
0 00080000 code_start
abs ffffffff etext
abs ffffffff pinit
GLOBAL SYMBOLS: SORTED BY Symbol Address
page address name
---- ------- ----
0 00000ce0 _Cla1SoftIntRegs
0 00008000 _InitFlash_Bank0
0 00008000 _RamfuncsRunStart
0 00008034 _InitFlash_Bank1
0 00008068 _FlashOff_Bank1
0 0000807c _FlashOff_Bank0
0 00008090 _F28x_usDelay
0 00008094 _RamfuncsRunEnd
0 00080000 code_start
0 00082000 ___cinit__
0 00082000 cinit
0 000820a8 _XINT5_ISR
0 000820b2 _XINT4_ISR
0 000820bc _XINT3_ISR
0 000820c6 _XINT2_ISR
0 000820d0 _XINT1_ISR
0 000820da _WAKE_ISR
0 000820e4 _VCU_ISR
0 000820ee _USER9_ISR
0 000820f8 _USER8_ISR
0 00082102 _USER7_ISR
0 0008210c _USER6_ISR
0 00082116 _USER5_ISR
0 00082120 _USER4_ISR
0 0008212a _USER3_ISR
0 00082134 _USER2_ISR
0 0008213e _USER1_ISR
0 00082148 _USER12_ISR
0 00082152 _USER11_ISR
0 0008215c _USER10_ISR
0 00082166 _USBA_ISR
0 00082170 _UPPA_ISR
0 0008217a _TIMER2_ISR
0 00082184 _TIMER1_ISR
0 0008218e _TIMER0_ISR
0 00082198 _SYS_PLL_SLIP_ISR
0 000821a2 _SPIC_TX_ISR
0 000821ac _SPIC_RX_ISR
0 000821b6 _SPIB_TX_ISR
0 000821c0 _SPIB_RX_ISR
0 000821ca _SPIA_TX_ISR
0 000821d4 _SPIA_RX_ISR
0 000821de _SD2_ISR
0 000821e8 _SD1_ISR
0 000821f2 _SCID_TX_ISR
0 000821fc _SCID_RX_ISR
0 00082206 _SCIC_TX_ISR
0 00082210 _SCIC_RX_ISR
0 0008221a _SCIB_TX_ISR
0 00082224 _SCIB_RX_ISR
0 0008222e _SCIA_TX_ISR
0 00082238 _SCIA_RX_ISR
0 00082242 _RTOS_ISR
0 0008224c _RAM_CORRECTABLE_ERROR_ISR
0 00082256 _RAM_ACCESS_VIOLATION_ISR
0 00082260 _PIE_RESERVED_ISR
0 0008226a _NOTUSED_ISR
0 00082274 _NMI_ISR
0 0008227e _MCBSPB_TX_ISR
0 00082288 _MCBSPB_RX_ISR
0 00082292 _MCBSPA_TX_ISR
0 0008229c _MCBSPA_RX_ISR
0 000822a6 _IPC3_ISR
0 000822b0 _IPC2_ISR
0 000822ba _IPC1_ISR
0 000822c4 _IPC0_ISR
0 000822ce _ILLEGAL_ISR
0 000822d8 _I2CB_ISR
0 000822e2 _I2CB_FIFO_ISR
0 000822ec _I2CA_ISR
0 000822f6 _I2CA_FIFO_ISR
0 00082300 _FPU_UNDERFLOW_ISR
0 0008230a _FPU_OVERFLOW_ISR
0 00082314 _FLASH_CORRECTABLE_ERROR_ISR
0 0008231e _EQEP3_ISR
0 00082328 _EQEP2_ISR
0 00082332 _EQEP1_ISR
0 0008233c _EPWM9_TZ_ISR
0 00082346 _EPWM9_ISR
0 00082350 _EPWM8_TZ_ISR
0 0008235a _EPWM8_ISR
0 00082364 _EPWM7_TZ_ISR
0 0008236e _EPWM7_ISR
0 00082378 _EPWM6_TZ_ISR
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abs 00000094 _RamfuncsLoadSize
abs 00000094 _RamfuncsRunSize
abs 00000100 __STACK_SIZE
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abs ffffffff .text
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abs ffffffff ___TI_prof_data_size
abs ffffffff ___TI_prof_data_start
abs ffffffff ___binit__
abs ffffffff ___c_args__
abs ffffffff ___etext__
abs ffffffff ___pinit__
abs ffffffff ___text__
abs ffffffff binit
abs ffffffff etext
abs ffffffff pinit
[592 symbols]
Thanks for the information. What is the scope of the array? Is it declared globally? Locally?
I know you said when you hit run the application crashes. If you were to place some breakpoints or step through the code, can you get an idea of where exactly the crash happens?
Thanks,
Whitney
The array is a local array in the private declaration area of a C++ class without any type specifiers like "static", "volatile"
The class is instance is made at the beginning of the main() function.
The debuggers virtual Programpointer doesn´t even reach the instantiation of the class. It opens a window saying "No source for available for
0x3fe493
a few lines of the disassambly :
3fe493: 7625 ESTOP0
3fe494: 6F00 SB 0, UNC
3fe495: 761B ASP
3fe496: FFF0 PUSH RB
3fe497: 0005 PUSH AR1H:AR0H
3fe498: ABBD MOVL *SP++, XT
3fe499: A8BD MOVL *SP++, XAR4
3fe49a: A0BD MOVL *SP++, XAR5
3fe49b: C2BD MOVL *SP++, XAR6
3fe49c: C3BD MOVL *SP++, XAR7
3fe49d: E20000BD MOV32 *SP++, STF
3fe49f: E20300BD MOV32 *SP++, R0H
3fe4a1: E20301BD MOV32 *SP++, R1H
In the console is written
"C28xx_CPU1: AutoRun: Target not run as breakpoint could not be set: Error enabling this function: This task cannot be accomplished with the existing AET resources."
If i run the application without breakpoints, the results are the same.
best regards,
Jasson
Okay, that address is the ITRAP interrupt handler in the boot ROM, meaning an invalid instruction was fetched. It's not uncommon for that to happen when your stack overflows. That seems plausible given that the problem depends on the size of a local variable.
Can you try making the stack bigger and see if that helps? If you don't know already how to do that, it's in Properties->Build->C2000 Linker->Basic Options.
Whitney
Is your instance inside main or outside? If it's inside, your stack will have to be huge.
Hello Whitney,
i have found, which original .cmd file is used
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(4)
.pinit : > FLASHB, PAGE = 0, ALIGN(4)
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
.esysmem : > RAMLS5 PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4)
.switch : > FLASHB PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#else
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
/* The following section definitions are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
As you can see from the naming, i have post-indexed it with an _ori, meaning original, since i have edited it.
As suggested, i changed the stack size in the CCS. It was x100. First i changed it to x400 which is the size of the RAMM1.
Since that didn´t worked (still the ETrap) i also moved RAMM0 from PAGE 0 to PAGE 1 and ored it with RAMM1 in the SECTIONS area of the file.
Current .cmd file:
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(4)
.pinit : > FLASHB, PAGE = 0, ALIGN(4)
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
/* Allocate uninitalized data sections: */
.stack : > RAMM0 | RAMM1 PAGE = 1
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
.esysmem : > RAMLS5 PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4)
.switch : > FLASHB PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#else
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
/* The following section definitions are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
...i see now, my thought with "oring" the RAMS is wrong.
I uncommented the RAMGS blocks 6 to 9 and defined an space named "STACK_RAM" which has the starting adress of RAMGS6 and the length of RAMGS6 to RAMGS9 combined.
Also i defined a stack size of h.4000 in the CCS and i can see a stack of h.4000 in the map file.
But i have still the same effect, that the application goes to E-Trap
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
STACK_RAM : origin = 0x012000, length = 0x004000
/*RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000*/
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(4)
.pinit : > FLASHB, PAGE = 0, ALIGN(4)
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
/* Allocate uninitalized data sections: */
.stack : > STACK_RAM PAGE = 1 /*RAMM1 PAGE = 1*/
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
.esysmem : > RAMLS5 PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4)
.switch : > FLASHB PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#else
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
/* The following section definitions are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
I figured out, that the system behaves differentely if i run the application by pressing the green triangle "run" button, or if i go step by step (Step into with F5).
With the run button, the application ends in the E-Trap at [3fe493: 7625 ESTOP0 ]
If i go step by step, it ends at 0x0 when leaving the constructor of a basecalss used in the very first instance of an object in the beginning of main();.
The instance at the beginning of main is "OnePhsSysInput".
"OnePhsSysInput" inherits from "OnePhaseBase" which in turn inherits from "SysCommons" which implements an interface "I_SysCommons" ("OnePhsSysInput" -> "OnePhaseBase" -> "SysCommons")
The app chrashes when leaving the constructor of OnePhaseBase
I have bunddled the files ina .7z zipped file
InputSystems.7z
What happens if you declare the object globally rather than in main on the stack?
