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TMS320F28335: Setting ADC clock frequency and conversion time for sequential mode

Part Number: TMS320F28335

Hello,

I have this clock chain settings:

XCLKIN               30MHz

SYSCLKOUT    150 MHz

HISPCP = 1, so HSPCLK = SYSCLKOUT/2 = 75 MHz (according to Table 3-5 of System Control and Interrupts)

ADCCLKPS = 0, so Fclk = HSPCLK

CPS = 1, so ADCCLK = Fclk/2 = 37.5 MHz 

ACQ_PS = 0xF, so S/H width is 16 ADCCLK pulses 

According to the features of ADC module described in 1.1 of SPRU812A, the fast conversion time runs at 12.5 MHz (ADC clock) or 6.25 MSPS. Which is the relation between this value and my ADDCLK calc of 37.5MHz. ? What am I missing?

I can't find the conversion time needed per channel for sequential mode. Can you help me? I need to know the converison time for 1 channel and for 14 channels with this settings of ADCCLK described above.

Thank you very much.

Maite

  • Maite,

    The ADC has a maximum supported clock speed of 25MHz per the datasheet:

    The ADC Reference Guide has a table showing how to configure the clocks for 12.5 MSPS operation:

    The ADC Reference Guide also has a timing diagram for sequential sampling.  The result will be ready at the end of C1:

    -Tommy