Part Number: TMS320F28379D
Tool/software: Code Composer Studio
Hi there.
I'm using SDFM with AMC1024 for the first time. I wired a testing HW with CLK generated by ECAP module: CLK is 20MHz duty 50%. ACM1024 respond to the DSP-CLK stimulus with a bit-stream that I can see on oscilloscope.
I configured the SW in this way:
Sdfm_configurePins();
Sdfm_configureInputCtrl(SDFM2, FILTER1, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER2, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER3, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER4, MODE_0);
HLT = 0x7FFF; //Over value threshold settings
LLT = 0x0000; //Under value threshold settings
// Configure Comparator module's comparator filter type and comparator's OSR
// value, higher threshold, lower threshold
Sdfm_configureComparator(SDFM2, FILTER1, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(SDFM2, FILTER2, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(SDFM2, FILTER3, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(SDFM2, FILTER4, SINC3, OSR_32,
HLT, LLT);
// Enable Master filter bit: Unless this bit is set none of the filter modules
// can be enabled. All the filter modules are synchronized when master filter
// bit is enabled after individual filter modules are enabled. All the filter
// modules are asynchronized when master filter bit is enabled before
// individual filter modules are enabled.
Sdfm_enableMFE(SDFM2);
// Data filter Module
//
// Configure Data filter modules filter type, OSR value and
// enable / disable data filter
Sdfm_configureData_filter(SDFM2, FILTER1, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER2, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER3, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER4, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
// Sdfm_configurePins - Configure SDFM GPIOs
//
void Sdfm_configurePins(void)
{
GPIO_SetupPinOptions(26, GPIO_INPUT, GPIO_ASYNC);
GPIO_SetupPinOptions(27, GPIO_INPUT, GPIO_ASYNC);
GPIO_SetupPinMux(26, GPIO_MUX_CPU1, 7); // DB - GPIO26 -> SD2-D2 PIN79-BOARD
GPIO_SetupPinMux(27, GPIO_MUX_CPU1, 7); // DB - GPIO27 -> SD2-C2 PIN81-BOARD
}
The questions are:
1) If I check SDDATA2 register in watch window I can see DATA32HI field that changes but DATA16 always at 0 value. In Sdfm_configureData_filter function there is a parameter that set data representation in 16b 2's complement so why am I observing this behavioral ? Are there something to check to apply SW changing and make application working correctly ?
2) I execute some checks on SDFM registers modified with TI drivers/functions: I report some register's field value looked in watch window that are present in TMR summary table since I think are involved in the process.
2.1) In SDCTLPARAM2 register I can see MOD = 0 since I sent the same CLK either AMC1024 and DSP;
2.2) In SDDFPARAM2 register SST = 3 since I want to use Sinc3 filter's structure -> Resolution will be to 25b so 9b shift will be necessary to recover 16b data. FEN = 1 and when I change at 0 the SSDATA2 register stops to changes -> It proves that filter receives a bitstream data. DOSR = 255 so with Sinc3 structure the data are 25b 2's complementary; At this point I have a specific question: does SDDATA2 contain all 25b or it just shifted by 9 steps ? Is it normal that the data are only in DATA32HI ? If I change value in ADC's input there is apparently linearity between analog value and data;
2.3) In SDIPARAM2 register SH = 9 and DR = 0 so data will be stored in 16b 2's complementary representation with Sinc3 filter's structure. With this settings how can I see data in SDDATA2 registers [no in this way if I read TMR page 1532] ?
2.4) HLT & LLT threshold will be a secondary concern only I sure that SDFM works well;
Finally, is there someone that can help me ? Thanks a lot.
Diego
