• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 81 subscribers
  • Views 744 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28069M: comparator module configuration and its slew rate

Indrajit Lawande95
Expert 1350 points

Part Number: TMS320F28069M
Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: Code Composer Studio

Hi ,I am working on F28069M , I have to configure Comparator available on ADC module .  I have configured as follows 

SysCtrlRegs.PCLKCR3.bit.COMP1ENCLK = 1; // COMP1

GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 3; // 0=GPIO, 1=EQEP1A, 2=MDXA, 3=COMP1OUT
GpioCtrlRegs.GPADIR.bit.GPIO20 = 1; // 1=OUTput, 0=INput

GpioCtrlRegs.AIOMUX1.bit.AIO2 = 2; 
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 1;
Comp1Regs.COMPCTL.bit.CMPINV = 0; 
Comp1Regs.COMPCTL.bit.SYNCSEL = 0; 
Comp1Regs.COMPCTL.bit.COMPDACEN = 1; 
Comp1Regs.COMPCTL.bit.COMPSOURCE = 0; 
Comp1Regs.DACVAL.all = 512; 

so that I have analog input A2 which is now connected to comparator1 as first input  and feeding second input of comparator from DAC(internal) with 512 value.  

My question are : 1) is this configuration is correct ? is there any missing configuration register other than mentioned above.How to modify it ?

                               2) what is slew rate of internal op-amp comparator. 

                             

  • 0
    TI__Mastermind 28275 points

    Hi Indrajit,

    1. The configuration looks correct. The only thing I see missing is "AdcRegs.ADCCTL1.bit.ADCBGPWD = 1;" that enables the bandgap shared by the adc and comparator. As another source of reference, you can find the device specific example code for the comparator in C:\ti\controlSUITE\development_kits\F28069 controlSTICK.

    2. Not sure what you mean by the slew rate of the comparator because the comparator output is digital. If you were referring to the slew rate of the DAC within the comparator, please look at the "Figure 6-31 DAC Settling Time" figure in the device data manual.