I am looking to use the TMS320F28377D processor in a new design. The data sheet for that processor indicates that this device can have up to 102KWords of RAM (204KBytes). The TRM for this processor, on Page 124, Figure 2-13, shows several separate blocks of RAM used for different purposes (CPU1.LSx RAM, CPU1.M0 RAM, CPU1.M1 RAM, CPU1.Dx RAM, CPU2....etc.). Is the 102KWords of RAM distributed between all of these blocks? If so, what is this distribution? If I have a 75KWord application program for CPU1 that needs to run from RAM for the higher speed requirement (transferred from Flash to RAM at boot time), where does that 75KWord program get placed? Is there a memory map that shows how large each of these memory blocks are?