CCS/TMS320F28379D: Is there any technique to fix the linker error?

ashok kumar6

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hi all,

The linker command am using C:\ti\c2000\C2000Ware_1_00_01_00\device_support\f2837xd\common\cmd\2837xD_RAM_lnk_cpu1.cmd

2837xD_RAM_lnk_cpu1.cmd", line 53: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x15cf page 0. Available memory ranges:
RAMM0 size: 0x2de unused: 0x7 max hole: 0x7
RAMD0 size: 0x800 unused: 0x50 max hole: 0x50
RAMLS0 size: 0x800 unused: 0x4c1 max hole: 0x4c1
RAMLS1 size: 0x800 unused: 0x800 max hole: 0x800
RAMLS2 size: 0x800 unused: 0x800 max hole: 0x800
RAMLS3 size: 0x800 unused: 0x800 max hole: 0x800
RAMLS4 size: 0x800 unused: 0x800 max hole: 0x800

Is it trail and error to find the text size?

Which section can club to section to increase, please let me know

Thanks

over 8 years ago

0 Ozino Odharo over 8 years ago

TI__Mastermind 20724 points

Hi Ashok,

Sometimes certain parts of .text cannot be split. This means it will need to have one continuous block in memory in order to fit. You will need to create a combined ramm section that the .text can use. For example, RAMLS2_3_4 would be the combined range for RAM's LS2,LS3, and LS4. This wiki page explains in further detail how to combine memory ranges.

The other thing you could try is to switch the split (>>) to a single (>) and see if the warning is removed. This will allocate memory to either region and not split it across memory regions.

Hope this helps.

Regards,

Ozino

0 ashok kumar6 over 8 years ago in reply to Ozino Odharo

Expert 1800 points

Hi,

Thanks for you are reply.

With split option i.e >> to single > linker output.

2837xD_RAM_lnk_cpu1.cmd", line 53: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x1603 page 0. Available memory ranges:

RAMM0 size: 0x2de unused: 0x2c0 max hole: 0x2c0

RAMD0 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS0 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS1 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS2 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS3 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS4 size: 0x800 unused: 0x800 max hole: 0x800

Without split option

2837xD_RAM_lnk_cpu1.cmd", line 53: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x1603 page 0. Available memory ranges:

RAMM0 size: 0x2de unused: 0x7 max hole: 0x7

RAMD0 size: 0x800 unused: 0x71 max hole: 0x71

RAMLS0 size: 0x800 unused: 0x4c1 max hole: 0x4c1

RAMLS1 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS2 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS3 size: 0x800 unused: 0x800 max hole: 0x800

RAMLS4 size: 0x800 unused: 0x800 max hole: 0x800

I think it may not be possible to fit my application onchip RAM, is it right?

If possible if you provide a sample file, to fit the sections, it would be greate.

Thanks

0 Ozino Odharo over 8 years ago in reply to ashok kumar6

TI__Mastermind 20724 points

Ashok,

Did you try combining the RAM LS memory ranges into one bigger memory range? This may allow your program to fit as it seems that part of the code cannot be split between RAM ranges. I would recommend trying to combine RAMLS0, RAMLS1, RAMLS2, RAMLS3, RAMLS4 ranges into one range. Perhaps renamed to be RAMLS1_2_3_4. Don't forget all to make a similar change to the .text section. If you need further information on how to combine memory ranges, please refer to the example provided in the link in my previous post. Thanks.

Regards,
Ozino

0 ashok kumar6 over 8 years ago in reply to Ozino Odharo

Expert 1800 points

Hi Ozino Odharo ,

Thank you very much.

Here is the linker files memory, and sections changes.

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
/* RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800 */
RAMLS_1_2_3_4 : origin = 0x008800, length = 0x002000
RESET : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
}

SECTIONS
{
codestart : > BEGIN, PAGE = 0
/*.text : > RAMM0 | RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0*/
.text : > RAMLS_1_2_3_4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS5, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1

ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0 PAGE = 0
#endif
#endif

/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}

GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}

/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Ozino Odharo over 8 years ago in reply to ashok kumar6

TI__Mastermind 20724 points

HI Ashok,

Glad it worked! Make sure to include the RAMLS0 memory range in your combined section or leave it as it's own memory range. Your start address does not include that of RAMLS0, but you have that section left out. Make sure the same changes are made in your .text section.

Regards,
Ozino

0 ashok kumar6 over 8 years ago in reply to Ozino Odharo

Expert 1800 points

Hi Ozino Odharo,

Thanks, you found my mistake.

Here is the updated map file.

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

   BEGIN           : origin = 0x000000, length = 0x000002
   RAMM0           : origin = 0x000122, length = 0x0002DE
   RAMD0           : origin = 0x00B000, length = 0x000800
   RAMLS0         : origin = 0x008000, length = 0x000800
    /* RAMLS1          : origin = 0x008800, length = 0x000800
   RAMLS2        : origin = 0x009000, length = 0x000800
   RAMLS3        : origin = 0x009800, length = 0x000800
   RAMLS4        : origin = 0x00A000, length = 0x000800 */
   RAMLS_1_2_3_4    : origin = 0x008800, length = 0x002000
   RESET           : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800

RAMLS5 : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000
   RAMGS12     : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS13     : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS14     : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS15     : origin = 0x01B000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
}

SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0
   /*.text            : > RAMM0 | RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0*/
   .text            : > RAMLS_1_2_3_4, PAGE = 0
   .cinit           : > RAMM0,     PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .stack           : > RAMM1,     PAGE = 1
   .ebss            : > RAMLS5,    PAGE = 1
   .econst          : > RAMLS5,    PAGE = 1
   .esysmem         : > RAMLS5,    PAGE = 1
   Filter_RegsFile : > RAMGS0,    PAGE = 1

ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,      PAGE = 0
   #else
    ramfuncs    : > RAMM0      PAGE = 0
   #endif
#endif

   /* The following section definitions are required when using the IPC API Drivers */
    GROUP : > CPU1TOCPU2RAM, PAGE = 1
    {
        PUTBUFFER
        PUTWRITEIDX
        GETREADIDX
    }

    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX : TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }

    /* The following section definition are for SDFM examples */
   Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
   Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Ozino Odharo over 8 years ago in reply to ashok kumar6

TI__Mastermind 20724 points

Ashok,

No problem. Glad to that your application is running.

-Ozino

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CCS/TMS320F28379D: Is there any technique to fix the linker error?