TMS320F28035: Using one shot mode to trigger from continuous stream of external pulses

Jari,

Can you describe your system a little more? Are you using the F28035 to generate the PWM control signals? What are the respective roles of the MCU and FPGA?

-Tommy

The fpga does the pwm and the timing pulses for the f28035. The configuration for the adc triggering and gpio is

   GpioCtrlRegs.GPADIR.all = 0x3F0FFF; // set gpio 0-21 as output

   GpioIntRegs.GPIOXINT2SEL.bit.GPIOSEL = 30; // GPIO30 set up as source for ext int2
   XIntruptRegs.XINT2CR.bit.ENABLE = 1; // enable xint2 to trigger ad conversions

AdcRegs.ADCSAMPLEMODE.bit.SIMULEN0 = 1;
    AdcRegs.ADCSAMPLEMODE.bit.SIMULEN2 = 1;
    AdcRegs.ADCSAMPLEMODE.bit.SIMULEN4 = 1;
    AdcRegs.ADCSAMPLEMODE.bit.SIMULEN6 = 1;
    AdcRegs.ADCSAMPLEMODE.bit.SIMULEN8 = 1;
    AdcRegs.ADCSAMPLEMODE.bit.SIMULEN10 = 0;

    AdcRegs.SOCPRICTL.bit.ONESHOT = 1; // every ext event only triggers ad converter once
    //dummy adc
    AdcRegs.ADCSOC0CTL.bit.CHSEL     = 0;    //set SOC0/1 channel select to ADCIN A0/B0
    AdcRegs.ADCSOC0CTL.bit.TRIGSEL     = 0x04;  // ext interrupt starts conversion
    AdcRegs.ADCSOC0CTL.bit.ACQPS     = 6;    //set SOC0/1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)

    //PFC current adc
    AdcRegs.ADCSOC2CTL.bit.CHSEL     = 3;    //set SOC2/3 channel select to ADCIN A3/B3
    AdcRegs.ADCSOC2CTL.bit.TRIGSEL     = 0x04;    // ext interrupt starts conversion
    AdcRegs.ADCSOC2CTL.bit.ACQPS     = 6;    //set SOC2/3 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)

    //heater adc
    AdcRegs.ADCSOC4CTL.bit.CHSEL     = 7;    //set SOC4 channel select to ADCIN A7/B7
    AdcRegs.ADCSOC4CTL.bit.TRIGSEL     = 0x04;    // ext interrupt starts conversion
    AdcRegs.ADCSOC4CTL.bit.ACQPS     = 6;    //set SOC4 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)

etc

the rest of the channels are set up with identical configuration with just different ad mux channel. I have 3 different currents that are measured from switch current measurement, so they need to be accurately positioned and thus need separate soc pulses from the fpga. Fpga does all of the control and mcu is used for housekeeping and to send the adc measurements through gpio 0-11 that are used as a parallel port.

The issue is that I only would prefer to use measurements from socs 2-10, but currently I am using 16 total conversions just to overflow the ad soc state machine in order for the system not to halt after first 10 ad conversions

-Jari

Jari,

Do you expect to have fixed times for when the ADC sampling should occur? For example, does the FPGA have fixed phase delays between PWMs that will never change, and you will always be sampling the currents at specific points in the PWM cycles?

-Tommy

Tommy,
The system is designed in a way that the sequence of ad conversions is the same and there is guaranteed minimum time between conversions, but the times between conversion triggers do fluctuate.

Jari,

Thanks for the clarification.  I was hoping to recommend an easier approach, but it looks like external triggering would be a good starting point after all.

Jari Honkanen said:

1. If I configure the adc so that soc 1 gets triggered with extint1 and soc 2 gets triggered with extint2 and I pull up both corresponding io:s at the same clock cycle, does the adc trigger acknowledge both, or will it just convert the higher priority one? Does it matter i the triggers are converting a/b channels as they do have separate s/h circuits?

An event trigger will initiate all SOCs that are configured to use the event.  The order in which they execute will depend on the SOC sequencer settings (like Round Robin or Priority).

Jari Honkanen said:

2. I need only 10 out of the possible 15 socs, but I could not figure out a way to make the system function properly if i don't use all available socs. What otherwise happens is that after soc 10, the pointer is set at soc 11 which never triggers as it is not configured therefore the system halts after 10 conversions. At the moment I have circumvented this by configuring all socs with multiple socs converting a single channel, but the timing gets significantly more difficult when compared to having the system only configured with one soc for one ad channel.

You do not need to configure all of the SOCs; the sequencer is able to skip SOCs that are not active/pending.  If the successive SOCs are not triggering, it may be because the interrupt flags are not being acknowledged.

-Tommy

Jari,

Correction / elaboration:

tlee said:

An event trigger will initiate all SOCs that are configured to use the event.  The order in which they execute will depend on the SOC sequencer settings (like Round Robin or Priority).

In one-shot mode, the event will only trigger one SOC at a time.  In the case of simultaneous sampling SOCs, both A and B channels will be converted.

-Tommy

I might have fixed the issue. I need further testing, but if I use the priority setting with soc 0-11 having high priority, then the system will not seize after last configured soc.

adding

AdcRegs.SOCPRICTL.bit.SOCPRIORITY = 0xb;

probably fixed the issue. I also noticed that I i send in trigger pulses faster than what the adc can convert, then the system will not convert all channels. Does this mean that every time I send a pulse in the ext input, the soc pointer will be advanced to point to next priority conversion whether the current has started converting?

-jari

Using the priority mode and guaranteeing that no new set of soc triggers are sent until the last configured soc has been started, the system seems to work. I did not find out why the system halts if priority mode is not used, but since everything works with the priority mode I consider the problem solved. Thank you for your help.

-Jari

Jari,

Glad that you have it working now.

In my own experience, I find that SOC servicing can sometimes be interrupted when I halt execution asynchronously.  If I load and execute the program without resetting the device, I can find myself in an overrun error state.

-Tommy