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TMS320F28335: motor speed and position calculation interrupt

Yang Sun
Prodigy 150 points
Part Number: TMS320F28335


Hi everyone,

I'm new to the micro controller. Currently I'm trying to understand the Example_2833xEqep_pos_speed from the TI control SUITE which I need to apply on a PMSM control. I'm stuck with the interrupt triggered by the  ePWM, my code is like below:

#if (CPU_FRQ_150MHZ)
#define CPU_CLK 150e6
#endif
#if (CPU_FRQ_100MHZ)
#define CPU_CLK 100e6
#endif

#define PWM_CLK 5e3 // 5kHz (300rpm) EPWM1 frequency. Freq. can be changed here
#define SP CPU_CLK/(2*PWM_CLK)
#define TBCTLVAL 0x200E // up-down count, timebase=SYSCLKOUT


void initEpwm()
{
EPwm4Regs.ETSEL.all=0x0A; // Interrupt on PRD
EPwm4Regs.ETPS.all=1;
EPwm4Regs.ETFLG.all=0;
EPwm4Regs.ETCLR.all=0;
EPwm4Regs.ETFRC.all=0;

EPwm4Regs.PCCTL.all=0;

EPwm4Regs.TBCTL.all=0x0010+TBCTLVAL; // Enable Timer
EPwm4Regs.TBPRD=SP;
}

I'm not pretty sure how long the time interval between two interrupts would be based on the two registers I marked as red and  If I want to calculate the speed and position every 0.1 ms what values should I change to. 

Thanks,

Yang Sun

  • 0
    Guru 30330 points
    Yang,

    Please share what your CPU CLK is. This will help us get the proper values needed.

    The calculation that you should use is Figure 6 Time-Base Frequency and Period of SPRUG04, the EPWM User Guide.
    You are using up-down count mode of the EPWM. The pwm period (T_PWM) is equal to 2 x TBPRD x T_TBCLK.
    If CPU_FRQ_100MHz , the CPUCLK = 100e6 (100MHz).
    set PWM_CLK to 10e3, for 10kHz Frequency, which give a 0.1ms period.
    SP is still CPU_CLK/(2*PWM_CLK).

    This should give an EPWM interrupt at 0.1ms.

    Thanks,
    Mark
  • 0 in reply to Mark Labbato
    Prodigy 150 points
    Dear Mark,
    Thanks for you response. My CPU CLK now is 150MHz. The interrupt is based on PRD instead of TBPRD. According to SPRUG04 fig.6, TPWM=2*TBPRD*TTBCLK, while 2*TBPRD=PRD. And T_TBCLK should be same as CPU_CLK. In order to get a 0.1ms period. The PWM_CLK should be 150e6/10e3=15e3. Am I right?

    Also, I'm still a little confused about what is the following line for:

    EPwm4Regs.TBCTL.all=0x0010+TBCTLVAL; // Enable Timer

    Does it mean the epwm is set to up-down count mode and TTBCLK=CPU_CLK?

    Really appreciated,
    Yang Sun
  • 0 in reply to Yang Sun
    Guru 30330 points
    Yang Sun,

    Yes, PWM_CLK should be set to 15e3 if you desire a .1ms period.

    It depends on what you set TBCTLVAL to be. By default, the EPWM will be set to up-down count and the timebase clock is CPUCLK.

    Thanks,
    Mark