Hello,
I couldn't find the PERCLKDIVSEL register in F280049 UG, d/s and header files. It is included in F28075. What has changed?
But I found the following note in F280049 UG (chapter 15.3.2.1):
"Note: The Type 4 EPWM clocking varies from previous EPWM types. Prior to the Type 4 EPWM, the
time-base submodule was clocked directly by the system clock (SYSCLKOUT). On this version of the
ePWM, there is a divider (EPWMCLKDIV) of the system clock which defaults to EPWMCLK =
SYSCLKOUT / 2."
The EPWMCLKDIV should be in the PERCLKDIVSEL.
Regards, Holger