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TMS320F28075: Combined Trigger Source for ADC?

sagar dhavali
Intellectual 555 points
Part Number: TMS320F28075


Hi,

I was wondering if we can have a combined trigger source for any ADC.

I know that one of the CPU timers or ePWM SOCs can be used as trigger source. But, in one of the application, I would like to measure some 20 samples using CPU 1 clock which has period of 250ns. But this process has to be started at the start of ePWM1 which has period of 11.7 us (85 KHz). So, once the capturing starts at the start of ePWM, I would like to continue measuring using CPU1 clock. The next set of values should follow the same process ie, start the process at the start of ePWM1 and continue measuring at CPU1 clock.

Is there any way to combine the the trigger sources?

  • 0
    TI__Guru 60865 points

    Hi Sagar,

    Is there any reason you are using a CPU timer for the 250ns periodic timer instead of an ePWM?  If you use an ePWM instead, you can sync the start of that timer to your other ePWM timer.  You can then use the faster timer as the ADC trigger.  To gather the samples, I'd probably recommend using ADC 'burst mode' to use the ADC result registers as a temporary buffer.

  • 0 in reply to Devin Cottier
    Intellectual 555 points

    1. ePWM timer is fixed and all other ePWMs are used. That is why I intend to use CPU timer which is free.
    2. If I use burst mode, that will convert SOCs in round-robin mode. will it not? I intend to use one or two SOCs and not the whole bunch of SOCs because they are being used to measure other signals.
    3. Coming to your suggestion, if I use ePWM2 at a faster rate and if I synch'ed it with ePWM1 at the start, does that guarantee that ePWM2 will be in sync with ePWM1 at the start of of ePWM1 every single time or at every rising edge of ePWM1? I doubt that because both will be at different frequencies. Please correct me if I am wrong.

    Going further, the frequency that I mentioned for ePWM1 (85 KHz) is not going to be constant going forward. It will be varying between 80 KHz to 90 KHz.

  • 0 in reply to sagar dhavali
    TI__Guru 60865 points
    Hi Sagar,

    1. There isn't any good way to sync. the CPU timer to the ePWM start. I think the best you can do is generate an ISR at the beginning of the ePWM period and have this start the CPU timer.
    2. I suggested burst mode because this will reduce the CPU overhead for generating samples so fast. If you have other samples, then I agree that you probably need to stick with regular round-robin mode. The samples will be coming every 30 CPU cycles or so, so you will need to use the DMA or CLA to process the conversions as they come.
    3a. You can have ePWM2 simultaneously load almost all control values on a sync input event. So you could have ePWM1 generate a sync event at period start or on a compare event. On this sync, you could reload the timer count of ePWM2 to 0 (timers start at the same time) and you can load a new ePWM period value based on the period of ePWM1 (timers are in sync).

    3b. Overall, I think you probably want something like:
    *ePWM2 is trigger for ADC
    *On sync event ePWM2 loads: new period, counter to 0, and enable SOC trigger
    *each ePWM2 ADC result triggers the DMA
    *After 20 DMA moves, a DMA interrupt occurs. In the DMA interrupt, the 20 samples are processed and the ePWM2 SOC trigger is disabled
    *The control logic that changes the frequency of ePWM1 should also calculate a new period value for ePWM2 shadow register
    *ePWM1 generates a sync output on ? event (probably count = 0 or a compare event)
  • 0 in reply to Devin Cottier
    Intellectual 555 points
    Hello Devin,

    Point 1 is what I have thought too. I kinda got assurance now.
    Point 3 is interesting. Let me explore that a bit.

    Thanks for your help. I appreciate it.