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CCS/F28M35H52C: Core communication, shared access and control module configuration

Part Number: F28M35H52C


Tool/software: Code Composer Studio

Hello,

1- I'm trying to configure the Concerto Ethernet. I just import the enet_uip_m3 example in v210 of master core and tried to blink the led. I notice that after the uDMA configuration, I cannot blink, but before all works fine.

GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 1);
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);

// Configure the DMA TX channel
uDMAChannelAttributeDisable(UDMA_CHANNEL_ETH0TX, UDMA_ATTR_ALL);
uDMAChannelControlSet(UDMA_CHANNEL_ETH0TX,
UDMA_SIZE_32 | UDMA_SRC_INC_32 |
UDMA_DST_INC_NONE | UDMA_ARB_8);

GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 1);
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);

2- Where the link command file is configured? I saw that the linker takes the cmd file in the cmd folder but I didn't find where the project configures that.

3- I', trying to write in the shared ram to comunicate between cores whitout using the IPC commands. I did that:

RAMMReqSharedMemAccess(S7_ACCESS,SX_M3MASTER);

// Send C28 messages
unsigned long *pulMsgRam; // Vector to send messages to C28
pulMsgRam = (void *)S7_ADDR; // Points to S7 SRAM
pulMsgRam[0] = 1234;//(unsigned long)i_plus1;

// Receive C28 messages
unsigned long *getMsgRam; // Vector to write message to M3
getMsgRam = (void *)S7_ADDR; // Point to S7 SRAM
get1 = getMsgRam[1]; 

RAMMReqSharedMemAccess(S7_ACCESS,SX_C28MASTER);

I cant see at each side that I can write but I can't see at the other core the value wrote by other core.