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CCS/TMS320F28377S: Flash API fails to work after power cycling/resetting the chip despite working flawlessly just after loading the program to the board, until an restart.

Part Number: TMS320F28377S
Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: Code Composer Studio

I am having trouble with the FLASH API tools for the F28377S chip.  When debugging the read/write to flash bank 0 works flawlessly, when the system is rebooted however, the FLASH API erase command fails to erase the sector in question (any sector) and the only error generated is FMSTAT 0x0C10 which corresponds to erase verify and command fail.  If I attempt to program an already clean sector, the Fapi_issueProgrammingCommand call fails save the new data.  The error code generated is the generic 500 error both times.  All the registers appear to be set correctly as i step through the program line by line leading up to the erase command.  I am not using ECC or DCSM in the program.  All functions are moved from FLASH to RAM in a SectionCopy.asm prior to executing the actual main program code, and I have verified that this is all being copied to ram correctly with the memory browser.  What further steps should i be taking to troubleshooting this issue, as having persistent memory for variable operation settings is a requirement of the system I am developing.  I can't provide full blocks of code, but will give a few snippets of what I currently have in the save to flash function as much of it was pulled from the example code in control suite anyway, apart from some diagnostic output code I have added to diagnose where the fail points might be and that has been mostly commented out.  I have tried this code on multiple devices and even on a TI-28377s Launchpad but had the same results which each.  My main concern is that something is being pre-loaded by the debugger but not effectively making it back to RAM after a power cycle.  What should look at now to try and diagnose this failure?

Associated Code Block for this function error:

 

  // Disable ECC.  ECC does not have to be disabled to do FSM operations like
    // program and erase.
    // However, on Sonata Rev. 0 silicon, due to an OTP ECC errata,
    // disable ECC to avoid ECC errors while using Flash API functions that
    // read TI-OTP

    EALLOW;
//    DcsmCommonRegs.FLSEM.all = 0x0A503;
    Flash0EccRegs.ECC_ENABLE.bit.ENABLE = 0x00;
    Flash0CtrlRegs.FRDCNTL.bit.RWAIT = 0x3;
    Flash0CtrlRegs.FBAC.all = 0x14;
//    Flash0CtrlRegs.FRD_INTF_CTRL.all = 0x3;
    EDIS;


        //
        // Bank0 Erase Program
        //
        EALLOW;

        //
        //Give pump ownership to FMC0
        //
        PUMPREQUEST = 0x5A5A0002;

        //
        // This function is required to initialize the Flash API based on System
        // frequency before any other Flash API operation can be performed
        // Note that the FMC0 register base address is passed as the parameter
        //
        oReturnCheck = Fapi_initializeAPI(F021_CPU0_W0_BASE_ADDRESS, 194);

        if(oReturnCheck != Fapi_Status_Success)
        {
            //
            // Check Flash API documentation for possible errors
            //
            Example_Error(oReturnCheck);
//            UARTprintf("Init err: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
            return;
        }
///        UARTprintf("Init pass: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
        //
        // Fapi_setActiveFlashBank function sets the Flash bank0 and FMC0 for
        // further Flash operations to be performed on the bank0.
        // Note that the parameter passed is Fapi_FlashBank0 since FMC0 register
        // base address is passed to Fapi_initializeAPI()
        //
        oReturnCheck = Fapi_setActiveFlashBank(Fapi_FlashBank0);
        if(oReturnCheck != Fapi_Status_Success)
        {
            //
            // Check Flash API documentation for possible errors
            //
            Example_Error(oReturnCheck);
//            UARTprintf("set act fail: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
            return;
        }
//        UARTprintf("set act pass: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
        //
        // Erase Sector
        //
//        Uint32 * ref;
//        for(i=0; i <= sectorLength; i+= 16 )
//        {
//            ref = (sectorIndex + i);
//            UARTprintf("SECTOR pre: 0x%x, 0x%x, 0x%x of 0x%x\n",*ref, ref, i, sectorLength);
//        }
        oReturnCheck = Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector,
                                                    (uint32 *)sectorIndex);
//        for(i=0; i <= sectorLength; i+=16)
//        {
//            ref = (sectorIndex + i);
//            UARTprintf("SECTOR post: 0x%x, 0x%x, 0x%x of 0x%x\n",*ref, ref, i, sectorLength);
//        }
        //
        // Wait until FSM is done with erase sector operation
        //
        while(Fapi_checkFsmForReady() != Fapi_Status_FsmReady){}
//        UARTprintf("erase done: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
        //
        // Verify that SectorL is erased.  The Erase step itself does a
        // verify as it goes.  This verify is a 2nd verification that can be done.
        //
        oReturnCheck = Fapi_doBlankCheck((uint32 *)sectorIndex,
                sectorLength,
                &oFlashStatusWord);

        if(oReturnCheck != Fapi_Status_Success)
        {
            //
            // Check Flash API documentation for possible errors
            // If Erase command fails, use Fapi_getFsmStatus() function to get the
            // FMSTAT register contents to see if any of the EV bit, ESUSP bit,
            // CSTAT bit or VOLTSTAT bit is set (Refer to API documentation for
            // more details)
            //
            Example_Error(oReturnCheck);
//            UARTprintf("erase ver fail: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
            return;
        }
//        UARTprintf("erase ver pass: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
        //
        // A data buffer of max 8 words can be supplied to the program function.
        // Each word is programmed until the whole buffer is programmed or a
        // problem is found. However to program a buffer that has more than 8
        // words, program function can be called in a loop to program 8 words for
        // each loop iteration until the whole buffer is programmed
        //

        //
        // Example: Program 0xFF bytes in Flash Sector C along with auto-
        // generated ECC
        //

        //
        // In this case just fill a buffer with data to program into the flash.
        //
//        for(i=0; i<=WORDS_IN_FLASH_BUFFER; i++)
//        {
//            Buffer[i] = i;
//        }
for(j=0; j<=blocksize;j+= 256)
{
            for(i=0; i<=WORDS_IN_FLASH_BUFFER; i++)
            {
                if((i+j)<blocksize)
                {
                Buffer[i] = *(dataBlockIndex+i+j);
                }
                else
                {
                    Buffer[i] = 0XFFFF;
                }
//                UARTprintf("buffer loaded: %u, 0x0%x, 0x0%x\n", i, j, Buffer[i]);
            }
        for(i=0, u32Index = sectorIndex + j;
            (u32Index < (sectorIndex + j + WORDS_IN_FLASH_BUFFER)) &&
            (oReturnCheck == Fapi_Status_Success); i+= 8, u32Index+= 8)
        {
            oReturnCheck = Fapi_issueProgrammingCommand((uint32 *)u32Index,Buffer+i,
                                                        8,0,0,
                                                        Fapi_DataOnly);

            while(Fapi_checkFsmForReady() == Fapi_Status_FsmBusy);

            if(oReturnCheck != Fapi_Status_Success)
            {
                //
                // Check Flash API documentation for possible errors
                //
                Example_Error(oReturnCheck);
//                UARTprintf("Prog fail: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
                return;
            }
//            UARTprintf("Prog pass: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
            //
            // Read FMSTAT register contents to know the status of FSM after
            // program command for any debug
            //
            oFlashStatus = Fapi_getFsmStatus();

            //
            // Verify the values programmed.  The Program step itself does a verify
            // as it goes.  This verify is a 2nd verification that can be done.
            //
            oReturnCheck = Fapi_doVerify((uint32 *)u32Index,4,Buffer32+(i/2),
                                         &oFlashStatusWord);

            if(oReturnCheck != Fapi_Status_Success)
            {
                //
                // Check Flash API documentation for possible errors
                //
                Example_Error(oReturnCheck);
//                UARTprintf("final FAIL: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
                return;
            }
//            UARTprintf("final PASS: %x, %x, %x\n",sectorIndex, sectorLength, dataBlockIndex);
        }

Thanks in advance,

Will

  • Hurley,

    1) Erase function does not return the 500 error as mentioned in the reference guide (www.ti.com/.../spnu630). Are you sure you got that value from the erase function?

    2) I understand that you are not using DCSM. However, did you check to see if your application is programming any of the DCSM OTP locations by mistake? Please check. If DCSM is enabled, you need to execute the API from secure memory (of same zone) and also initialize the FLSEM for appropriate zone.

    3) For section copy, are you using the DSP28xxx_SectionCopy_nonBIOS.asm described in SPRAAU8? If yes, did you get the updated file from e2e.ti.com/.../21164 ?
    Did you copy all the required sections to RAM?
    Did you copy the functions in Fapi_UserDefinedFunctions.c file as well to RAM?

    4) Did you make sure that you are providing a valid address to the erase or program functions (may be you can print that and check to make sure in the non-debugger case. I understand you see the sectors getting erased when debugger is connected)?

    5) Did you check if there is any dip in voltage lines during erase or program operation?

    6) For the Flash initialization, could you follow the exact sequence provided in InitFlash_Bank0() in F2837xS_SysCtrl.c?

    7) Are you able to successfully execute the Flash API usage example from controlSuite after a power cycle?

    8) When you load your code to Flash using TI tools, do you make sure to keep the AutoEccGeneration option enabled (default is enabled)? You need to keep this enabled so that ECC is programmed for your application to avoid ECC errors when the application gets executed from Flash on a power-cycle. I understand that you are disabling ECC later - but ECC should be programmed for the code in Flash so that errors does not occur until ECC is disabled during initialization routine.

    When debugger is connected, only thing that gel does that can effect your debug is that it disables ECC and watchdog. I think your application is also disabling these (ECC for sure. Not sure about watchdog - If enabled, may be your application is servicing it properly since you did notice any reset toggles on XRSn pin).

    Thanks and regards,
    Vamsi
  • Vamsi,

    Thanks for the quick response. I have gone through each of these already, except physically checking voltage drops and running the fapi example from stand alone boot. I will start there and also go through each of the other steps again to make sure I didn't miss anything during my previous troubleshooting; as I'm sure you know, the eyes can glaze over a little when you've been staring at the same code for too long, so I'll ensure that isn't part of the problem as I go back over it all. I should either have a working on-chip flash programmer or a detailed synopsis of my findings while I walk through the recommendations you provided.

    Much appreciated,
    Will
  • Vamsi,

    In response to your list:

    "1) Erase function does not return the 500 error as mentioned in the reference guide (www.ti.com/.../spnu630). Are you sure you got that value from the erase function?"

    You are correct, it is the Fapi_doBlankCheck(….); that was returning the Fapi_Error_Fail – 500.

    "2) I understand that you are not using DCSM. However, did you check to see if your application is programming any of the DCSM OTP locations by mistake? Please check. If DCSM is enabled, you need to execute the API from secure memory (of same zone) and also initialize the FLSEM for appropriate zone."

    I have verified that the DCSM is not being used, all the associated registers are reflecting this.

    "3) For section copy, are you using the DSP28xxx_SectionCopy_nonBIOS.asm described in SPRAAU8? If yes, did you get the updated file from e2e.ti.com/.../21164 ?
    Did you copy all the required sections to RAM?
    Did you copy the functions in Fapi_UserDefinedFunctions.c file as well to RAM?"

    I used a slightly modified version, and I am now copying ramfuncs in this file as well, but I doubt this to be the problem as I was seeing the issue before I moved the copy ramfuncs functionality from .main, and I have verified that the location in ram has the same binary values as the location in flash where they are copied from. I have done a brief glance to ensure all sections in the SectionCopy.asm are in fact being copied to their allocated run RAM blocks. I compared my file with the one provided above and it was the same, except that I don’t have the “ ;SUBB XAR5,#1“, as they are commented out in the provided code; should these be active instructions?

    "4) Did you make sure that you are providing a valid address to the erase or program functions (may be you can print that and check to make sure in the non-debugger case. I understand you see the sectors getting erased when debugger is connected)?"

    I am printing all the address values, sizes, sources, etc. to the serial port and monitoring that everything here is as it should be at every subsequent step.

    "5) Did you check if there is any dip in voltage lines during erase or program operation?"

    *****I will tackle this tomorrow if the rest show no improvement in Fapi functionality.******

    "6) For the Flash initialization, could you follow the exact sequence provided in InitFlash_Bank0() in F2837xS_SysCtrl.c?"

    I am following the sequence exactly

    "7) Are you able to successfully execute the Flash API usage example from controlSuite after a power cycle?"

    *****I will tackle this tomorrow as well, I need to modify the example to get it working. ******

    "8) When you load your code to Flash using TI tools, do you make sure to keep the AutoEccGeneration option enabled (default is enabled)? You need to keep this enabled so that ECC is programmed for your application to avoid ECC errors when the application gets executed from Flash on a power-cycle. I understand that you are disabling ECC later - but ECC should be programmed for the code in Flash so that errors does not occur until ECC is disabled during initialization routine.

    When debugger is connected, only thing that gel does that can effect your debug is that it disables ECC and watchdog. I think your application is also disabling these (ECC for sure. Not sure about watchdog - If enabled, may be your application is servicing it properly since you did notice any reset toggles on XRSn pin). "

    I am servicing the watchdog in Fapi_UserDefinedFunctions.c and as you acknowledged, I’m not getting resets or caught in estop traps. So I doubt this to be the culprit either. I have tried both with and without ECC, both ways work upon initial debug boot, but fail in both standalone and after restart through CCS debug.

    I will run the other two to ground tomorrow, but so far, I haven’t come across anything that stands out to me as a clear failpoint.

    If any of this feedback can help to narrow my search window, please let me know where that might me.

    Thanks and regards,
    Vamsi
  • I forgot to sign this reply, but it was Will.
  • Will,

    Thank you for going through all the points carefully.

    #3:  No need of that instruction since subtraction is done on Accumulator in the copy function.  Few more questions below to help your debug: 

    3.1) Did you modify your linker command file to specify the load and run address symbols for all the sections that you are copying to RAM?

    3.2) Did you make sure that any of the user defined text sections that have different load (flash) and run (RAM) addresses are added to "DSP28xxx_SectionCopy_nonBIOS.asm" so that they get copied correctly since you may have removed memcpy()?  

    3.3) Did you make sure to replace any .sect “ramfuncs” (or .sect ".TI.ramfunc") in any of the asm files to .sect “text” so that "DSP28xxx_SectionCopy_nonBIOS.asm" can copy those sections as part of .text section?

    3.4) Did you make sure to remove any #pragma CODE_SECTION(xx, “ramfuncs”) (or #pragma CODE_SECTION(xx, “.TI.ramfunc”)) so that they get mapped to .text section?

    3.5) Did you make sure to remove memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize) since the code gets copied by "DSP28xxx_SectionCopy_nonBIOS.asm" even before reaching _c_int00?

    #4:  Hope you are using Bank0 sector addresses since you configured the API for Bank0.

    #6:  Looking at your code, I don't think you are following the exact sequence as that of InitFlash_Bank0().  May be you can call the function that TI provided (you can disable ECC at the end if you want).

    #8: Regarding the watchdog service:  As mentioned in section 3.6.1 Fapi_serviceWatchdogTimer() of SPNU630 document, please make sure to include an EALLOW at the end of the watchdog service function's body to allow the later executed API functions to write to protected registers as required.  See below.

    Fapi_StatusType Fapi_serviceWatchdogTimer(void)

    {

    /* User to add their own watchdog servicing code here */

    ServiceDog(); //Your own function body

    EALLOW; // Add this EALLOW

    return(Fapi_Status_Success);

    }

    Thanks and regards,
    Vamsi

  • Will,

    Also make sure that there are no initialized sections mapped to RAM in your linker command file. Initialized sections mapped to RAM will not be loaded by the TI Flash tools. TI Flash tools are meant for fully embedded Flash applications.

    Thanks and regards,
    Vamsi
  • Vamsi,

    I appreciate the detailed breakdown.  Of the items listed the only standout was that I was not calling EALLOW prior to return on the Fapi watchdog servicer.  I will check if that was the issue now and get back to you if it is the solution to my problem, otherwise I will continue with items 5 and 7 from yesterday as I have had to rebuild the soldering station to gain further access to the chip-pins, and have to make a few more slight modifications to the Flash Programming example project to have it run standalone on the board after a power cycle/reset. 

    The other Items you detailed in the earlier post today are all checked out.  The flash bank initialization is called from the sysctl.c function, the additional register settings were put in to the function code block I copied/pasted to the forum as a diagnostic step, to ensure that the registers weren't somehow being reset to different values just after calling the save function and it appears at this point they are redundant and can be removed again.

    I will keep you updated to my progress as I move through the items mentioned above.

    Thanks again for the assistance,

    Will

  • Actually, Let me clarify:
    The "ramfuncs" are not in .text section, they are still in "ramfuncs" but I call the copy of that section in the copysections.asm
    I will include linker and copy sections code here for review, let me know if there could be a problem there that stands out to you.

    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    Linker command file:

    MEMORY
    {
    PAGE 0 : /* Program Memory */
    /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMM0 : origin = 0x000122, length = 0x0002DE
    RAMD0 : origin = 0x00D000, length = 0x000800
    RAMD1 : origin = 0x00D800, length = 0x000800
    // RAMLS0 : origin = 0x008000, length = 0x000800
    // RAMLS1 : origin = 0x008800, length = 0x001000
    RAMGS0 : origin = 0x014000, length = 0x008000
    RESET : origin = 0x3FFFC0, length = 0x000002





    /* Flash sectors */
    /* Flash Bank 0 */
    FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
    // FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
    // FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
    // FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
    // FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
    FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
    FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
    FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
    FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
    // FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
    // FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
    FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
    FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
    /* Flash Bank 1 */
    FLASHO : origin = 0x0C0000, length = 0x002000 /* on-chip Flash */
    FLASHP : origin = 0x0C2000, length = 0x002000 /* on-chip Flash */
    FLASHQ : origin = 0x0C4000, length = 0x002000 /* on-chip Flash */
    FLASHR : origin = 0x0C6000, length = 0x002000 /* on-chip Flash */
    FLASHS : origin = 0x0C8000, length = 0x008000 /* on-chip Flash */
    FLASHT : origin = 0x0D0000, length = 0x008000 /* on-chip Flash */
    FLASHU : origin = 0x0D8000, length = 0x008000 /* on-chip Flash */
    FLASHV : origin = 0x0E0000, length = 0x008000 /* on-chip Flash */
    FLASHW : origin = 0x0E8000, length = 0x008000 /* on-chip Flash */
    FLASHX : origin = 0x0F0000, length = 0x008000 /* on-chip Flash */
    FLASHY : origin = 0x0F8000, length = 0x002000 /* on-chip Flash */
    FLASHZ : origin = 0x0FA000, length = 0x002000 /* on-chip Flash */
    FLASHAA : origin = 0x0FC000, length = 0x002000 /* on-chip Flash */
    FLASHAB : origin = 0x0FE000, length = 0x002000 /* on-chip Flash */

    PAGE 1 : /* Data Memory */
    /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */



    BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
    RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
    // RAMD0 : origin = 0x00D000, length = 0x000800
    // RAMD1 : origin = 0x00D800, length = 0x000800
    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x001000
    RAMLS2 : origin = 0x009800, length = 0x003000
    RAMLS3 : origin = 0x00C800, length = 0x000800
    RAMGS1 : origin = 0x00E000, length = 0x004800
    RAMGS2 : origin = 0x012800, length = 0x001800

    FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
    FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
    FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
    FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
    FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
    FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
    FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */


    }


    SECTIONS
    {

    code_start: > BEGIN PAGE = 0, ALIGN(4)
    wddisable: > FLASHA PAGE = 0, ALIGN(4)
    copy_sections: > FLASHA PAGE = 0, ALIGN(4)
    .reset: > BEGIN, PAGE = 0, TYPE = DSECT


    /* Allocate program areas: */



    wddisable: LOAD > FLASHA
    RUN > RAMD1,
    LOAD_START(_wdLoadStart),
    LOAD_SIZE(_wdLoadSize),
    LOAD_END(_wdLoadEnd),
    RUN_START(_wdRunStart),
    RUN_SIZE(_wdRunSize),
    RUN_END(_wdRunEnd),
    PAGE = 0, ALIGN(4)





    .main: LOAD > FLASHA
    RUN > RAMD1,
    LOAD_START(_MainLoadStart),
    LOAD_SIZE(_MainLoadSize),
    LOAD_END(_MainLoadEnd),
    RUN_START(_MainRunStart),
    RUN_SIZE(_MainRunSize),
    RUN_END(_MainRunEnd),
    PAGE = 0, ALIGN(4)

    .cinit: LOAD > FLASHA,
    RUN > RAMD0,
    LOAD_START(_CinitLoadStart),
    LOAD_SIZE(_CinitLoadSize),
    LOAD_END(_CinitLoadEnd),
    RUN_START(_CinitRunStart),
    RUN_SIZE(_CinitRunSize),
    RUN_END(_CinitRunEnd),
    PAGE = 0, ALIGN(4)

    .pinit: LOAD > FLASHA,
    RUN > RAMM0,
    LOAD_START(_PinitLoadStart),
    LOAD_SIZE(_PinitLoadSize),
    LOAD_END(_PinitLoadEnd),
    RUN_START(_PinitRunStart),
    RUN_SIZE(_PinitRunSize),
    RUN_END(_PinitRunEnd),
    PAGE = 0, ALIGN(4)


    .text: LOAD = FLASHF,//FLASHE PAGE = 0, ALIGN(4)
    RUN = RAMGS0,
    LOAD_START(_TextLoadStart),
    LOAD_SIZE(_TextLoadSize),
    LOAD_END(_TextLoadEnd),
    RUN_START(_TextRunStart),
    RUN_SIZE(_TextRunSize),
    RUN_END(_TextRunEnd),
    PAGE = 0, ALIGN(4)


    ramfuncs: LOAD = FLASHA,
    RUN = RAMD1,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)

    /* .ebss: LOAD = FLASHE,
    RUN = RAMGS2,
    LOAD_START(_ebss_loadstart),
    LOAD_SIZE(_ebss_size),
    RUN_START(_ebss_runstart),
    PAGE = 1, ALIGN(4)
    */
    .econst: LOAD = FLASHG,//FLASHE PAGE = 0, ALIGN(4)
    RUN = RAMGS1,
    LOAD_START(_const_loadstart),
    LOAD_SIZE(_const_loadsize),
    RUN_START(_const_runstart),
    PAGE = 1, ALIGN(4)



    /* Allocate uninitalized data sections: */

    .stack : > RAMLS1, PAGE = 1
    .ebss : > RAMGS2, PAGE = 1
    // .econst : > FLASHG, PAGE = 1 /*> RAMGS1 | RAMLS2 | RAMLS5, PAGE = 1*/
    .esysmem : > RAMLS0, PAGE = 1
    .cio : > RAMM1, PAGE = 1



    /* User Defined Memory Data Sectors: */

    BufferDataSection : > RAMLS3, PAGE = 1, ALIGN(4)
    highrl : > RAMLS2, PAGE = 1, ALIGN(4)
    lowrl : > RAMLS2, PAGE = 1, ALIGN(4)
    timerl : > RAMLS2, PAGE = 1, ALIGN(4)
    healthl : > RAMLS3, PAGE = 1, ALIGN(4)
    healthlims : > RAMLS3, PAGE = 1, ALIGN(4)
    users : > RAMLS3, PAGE = 1, ALIGN(4)
    savedusers : > FLASHK, PAGE = 1, ALIGN(4)
    savedusersdef : > FLASHB, PAGE = 1, ALIGN(4)
    persist : > RAMLS3, PAGE = 1, ALIGN(4)
    persistset : > FLASHL, PAGE = 1, ALIGN(4)
    flashlimits : > RAMLS3, PAGE = 1, ALIGN(4)
    flashsysdetails : > RAMLS3, PAGE = 1, ALIGN(4)
    healthlimsdefault : > FLASHB, PAGE = 1, ALIGN(4)
    healthlimssaved : > FLASHC, PAGE = 1, ALIGN(4)
    bootops : > FLASHD, PAGE = 1, ALIGN(4)
    bootopsdef : > FLASHB, PAGE = 1, ALIGN(4)

    }


    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */


    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    Copy sections file:


    ;############################################################################
    ;
    ; FILE: DSP28xxx_SectionCopy_nonBIOS.asm--Modified for Controller_II_v1_0
    ;
    ; DESCRIPTION: Provides functionality for copying intialized sections from
    ; flash to ram at runtime before entering the _c_int00 startup
    ; routine
    ;############################################################################



    .ref _c_int00



    .global copy_sections
    .global _const_loadstart, _const_runstart, _const_loadsize
    .global _MainLoadStart, _MainRunStart, _MainRunSize
    .global _PinitLoadStart, _PinitRunStart, _PinitRunSize
    .global _TextLoadStart, _TextRunStart, _TextRunSize
    .global _CinitLoadStart, _CinitRunStart, _CinitRunSize
    .global _wdLoadStart, _wdRunStart, _wdRunSize
    .global _RamfuncsLoadStart, _RamfuncsRunStart, _RamfuncsRunSize
    .bss VarA,1

    ;***********************************************************************
    ;* Function: copy_sections
    ;*
    ;* Description: Copies initialized sections from flash to ram
    ***********************************************************************

    .sect "copy_sections"

    copy_sections:




    MOVL XAR5,#_const_loadsize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_const_loadstart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_const_runstart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy

    MOVL XAR5,#_wdRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_wdLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_wdRunStart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy


    MOVL XAR5,#_PinitRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_PinitLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_PinitRunStart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy


    MOVL XAR5,#_MainRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_MainLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_MainRunStart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy


    MOVL XAR5,#_RamfuncsRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_RamfuncsLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_RamfuncsRunStart ; Store Run Address in XAR7
    LCR copy ;Branch to Copy


    MOVL XAR5,#_TextRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_TextLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_TextRunStart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy

    MOVL XAR5,#_CinitRunSize ; Store Section Size in XAR5
    MOVL ACC,@XAR5 ; Move Section Size to ACC
    MOVL XAR6,#_CinitLoadStart ; Store Load Starting Address in XAR6
    MOVL XAR7,#_CinitRunStart ; Store Run Address in XAR7
    LCR copy ; Branch to Copy

    LB _c_int00 ; Branch to start of boot.asm in RTS library

    copy:
    B return,EQ ; Return if ACC is Zero (No section to copy)

    SUBB ACC,#1

    RPT AL ; Copy Section From Load Address to
    || PWRITE *XAR7, *XAR6++ ; Run Address

    return:
    LRETR ; Return

    .end

    ;//===========================================================================
    ;// End of file.
    ;//===========================================================================

    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  • Vamsi,

    It was the missing EALLOW; in the Fapi service watchdog function.

    Thank you for catching that, I had been over the code sections so many times I don't think it was seeing it properly anymore. At any rate, you can ignore the need to respond to the previous two posts, before I checked that this was a solution.

    Much appreciated and have a great weekend,
    Will
  • Will,

    Glad that it helped.
    Have a happy weekend.

    Best regards,
    Vamsi