CCS/TMS320F28377S: TMS320F28377S

vadim piskun

Tool/software: Code Composer Studio

Hi,

I am using Launchpad F28377s. I would like to synchronize ePWM7 – ePWM11. I have some difficulties achieving it. I configured ePWM7 as master and the rest ePWMs as slaves. I can change on the fly the value of EPwmyRegs.TBPHS.bit.TBPHS where y can be 8, 9 and see on the scope the signal is shifting. If y equals 10, 11 nothing is happening. If I reconfigure ePWM10 as master I can shift ePWM11 against ePWM10. I as well noticed if I put in EPwmyRegs.TBPHS.bit.TBPHS (y=8,9) 1000,1001 the phase shift does not happen, through it works fine with 999 and 1002. The difference between ePWM7-9 and ePWM10-11 is different MUX group.

Appreciate your help!

//###########################################################################

#include "F28x_Project.h"

// Function Prototypes

void ConfigureEPwm7(void);

void ConfigureEPwm8(void);

void ConfigureEPwm9(void);

void ConfigureEPwm10(void);

void ConfigureEPwm11(void);

void main(void)

{

InitSysCtrl();

InitGpio(); // Skipped for this example

InitEPwm7Gpio();

InitEPwm8Gpio();

InitEPwm9Gpio();

InitEPwm10Gpio();

InitEPwm11Gpio();

ConfigureEPwm7();

ConfigureEPwm8();

ConfigureEPwm9();

ConfigureEPwm10();

ConfigureEPwm11();

InitPieCtrl();

IER = 0x0000;

IFR = 0x0000;

InitPieVectTable();

EALLOW;

ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0;

EDIS;

// sync ePWM

EALLOW;

CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;

//take conversions indefinitely in loop

{

//software breakpoint, hit run again to get updated conversions

// asm(" ESTOP0");

}while(1);

}

void ConfigureEPwm7()

{

// Setup TBCLK

EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

EPwm7Regs.TBPRD = 2500; // Set timer period

EPwm7Regs.CMPA.bit.CMPA = 125; // Set compare A value

EPwm7Regs.DBCTL.bit.OUT_MODE= DB_FULL_ENABLE; // enable Dead-band module

EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm7Regs.DBFED.all = 0; // FED = 50 TBCLKs

EPwm7Regs.DBRED.all = 0;

EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE;

EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;

EPwm7Regs.TBPHS.all = 0;

// Set actions

EPwm7Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM7A on Period

EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM7A on event A,

// up count

EPwm7Regs.AQCTLB.bit.PRD = AQ_SET;

EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR;

}

void ConfigureEPwm8()

{

// Setup TBCLK

EPwm8Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

EPwm8Regs.TBPRD = 2500; // Set timer period

EPwm8Regs.CMPA.bit.CMPA = 125; // Set compare A value

EPwm8Regs.DBCTL.bit.OUT_MODE= DB_FULL_ENABLE; // enable Dead-band module

EPwm8Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm8Regs.DBFED.all = 0; // FED = 50 TBCLKs

EPwm8Regs.DBRED.all = 0;

EPwm8Regs.TBCTL.bit.PHSEN = TB_ENABLE;

EPwm8Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

EPwm8Regs.TBPHS.bit.TBPHS = 250;

// Set actions

EPwm8Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM2A on Period

EPwm8Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on event A,

// up count

EPwm8Regs.AQCTLB.bit.PRD = AQ_SET;

EPwm8Regs.AQCTLB.bit.CAU = AQ_CLEAR;

}

void ConfigureEPwm9()

{

EPwm9Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

EPwm9Regs.TBPRD = 2500; // Set timer period

EPwm9Regs.CMPA.bit.CMPA = 125; // Set compare A value

EPwm9Regs.DBCTL.bit.OUT_MODE= DB_FULL_ENABLE; // enable Dead-band module

EPwm9Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm9Regs.DBFED.all = 0; // FED = 50 TBCLKs

EPwm9Regs.DBRED.all = 0;

EPwm9Regs.TBCTL.bit.PHSEN = TB_ENABLE;

EPwm9Regs.TBCTL.bit.PHSDIR = TB_DOWN;

EPwm9Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

EPwm9Regs.TBPHS.bit.TBPHS = 250;

// Set actions

EPwm9Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM2A on Period

EPwm9Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on event A,

// up count

EPwm9Regs.AQCTLB.bit.PRD = AQ_SET;

EPwm9Regs.AQCTLB.bit.CAU = AQ_CLEAR;

}

void ConfigureEPwm10()

{

EPwm10Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

EPwm10Regs.TBPRD = 2500; // Set timer period

EPwm10Regs.CMPA.bit.CMPA = 125; // Set compare A value

EPwm10Regs.DBCTL.bit.OUT_MODE= DB_FULL_ENABLE; // enable Dead-band module

EPwm10Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm10Regs.DBFED.all = 0; // FED = 50 TBCLKs

EPwm10Regs.DBRED.all = 0;

EPwm10Regs.TBCTL.bit.PHSEN = TB_ENABLE;

EPwm10Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

EPwm10Regs.TBPHS.bit.TBPHS = 250;

// Set actions

EPwm10Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM2A on Period

EPwm10Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on event A,

// up count

EPwm10Regs.AQCTLB.bit.PRD = AQ_SET;

EPwm10Regs.AQCTLB.bit.CAU = AQ_CLEAR;

}

void ConfigureEPwm11()

{

EPwm11Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

EPwm11Regs.TBPRD = 2500; // Set timer period

EPwm11Regs.CMPA.bit.CMPA = 125; // Set compare A value

EPwm11Regs.DBCTL.bit.OUT_MODE= DB_FULL_ENABLE; // enable Dead-band module

EPwm11Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm11Regs.DBFED.all = 0; // FED = 50 TBCLKs

EPwm11Regs.DBRED.all = 0;

EPwm11Regs.TBCTL.bit.PHSEN = TB_ENABLE;

EPwm11Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

EPwm11Regs.TBPHS.bit.TBPHS = 250;

// Set actions

EPwm11Regs.AQCTLA.bit.PRD = AQ_CLEAR; // Clear PWM2A on Period

EPwm11Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on event A,

// up count

EPwm11Regs.AQCTLB.bit.PRD = AQ_SET;

EPwm11Regs.AQCTLB.bit.CAU = AQ_CLEAR;

}

// End of file

over 9 years ago

0 Brett Larimore over 9 years ago

TI__Guru 57255 points

Hi Vadim,

I believe that what you are seeing is a result of the ePWM synchronization scheme used on this device.

Please take a look at Figure labeled "Time-Base Counter Synchronization Scheme" in your F28377S device's TRM:
http://www.ti.com/lit/spruhx5

In it you'll see it is not possible for ePWM9 to be a synchronization master for ePWM10. However, ePWM10 can synchronize directly to ePWM7, if some registers are configured appropriately. (SYNCSELECT[EPWM10SYNCIN])

Hopefully this helps!

Thank you,
Brett

0 vadim piskun over 9 years ago

Expert 2250 points

Thanks Brett!
It helped. Is there a way to find out why 1000,1001 does not provide a phase shift?
Thanks, vadim

0 Brett Larimore over 9 years ago in reply to vadim piskun

TI__Guru 57255 points

Hi Vadim,

It is not clear to me what the description of the issue is - for the second part. I think a bit more detail may help.

For instance, with TBPHS configured as 1000 & 1001, are you seeing no phase shift occur or just not the phase shift you expect?

Thank you,
Brett

0 vadim piskun over 9 years ago in reply to Brett Larimore

Expert 2250 points

Hi Brett,
I do not see it. For example there is a large shift (999/2500) when TBPHS is 999. When I set 1000, 1001 it goes to 0 shift (the same phase), and when I set 1002 it goes back to a large shift (1002/2500). I would expect that for all those numbers shift does not jump and stay the same around 40%
Thanks vadim

0 Brett Larimore over 9 years ago in reply to vadim piskun

TI__Guru 57255 points

Hi Vadim,

So, it seems with TBPHS set as 1000 you do see a phase shift occur. However, it looks to be a phase shift of 0, instead of ~40%.

When you set TBPHS to 1000, can you confirm to see that the register is getting set to 1000 via the CCS Expressions window/Watch Window?
How are you changing the TBPHS? Via software or via writes to the Expressions Window?

Thank you,
Brett

0 vadim piskun over 9 years ago in reply to Brett Larimore

Expert 2250 points

Hi Brett,
Thanks for your support! I was writing directly into the registers. The default is binary. I was writing decimal number. If digits were 0s and 1s it presumed it is binary when other digits are present CCS first does conversion to binary; so my 1000 and 1001 in decimal were interpreted as 0000000000001000.
Thanks vadim

C2000™︎ microcontrollers

C2000 microcontrollers forum

CCS/TMS320F28377S: TMS320F28377S