SPRUFN3D, "Piccolo System Control & Interrupts" page 130 and 131, Tables 116 and 117.
As I was reading through the literature for the interrupts for the Piccolo, I note the two tables for the IER and the DBGIER.
The tables list the interrupt enable bits for the CPU. The first two entries for the RTOSINT, and the DLOGINT refer to "Level INT6" (note INT6 not INT16 or INT06).
Shouldn't the RTOSINT be INT16, and DLOGINT be INT15?
Or are they really the same as bit 5 farther down the list?
Thanks, Mark.
