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TMS320F28035: [F28035] the operation of SCI SWRESET bit

Brian Chang90901
Intellectual 2540 points
Part Number: TMS320F28035


Hi Champs,

My customer would like to know

1. How much clock  need to progress SCI SW RESET by enabling the bits at SCI module?

2. Will  the SW Reset clear bit counters at shift register ??

please have us your suggestion.

Thanks

BR

Brian

  • 0
    TI__Mastermind 42195 points

    Brian,

    1. I don't understand your first question, to reset the module simply clear SW RESET and then set SW RESET = 1.
    2. The SW RESET bit will not clear RXFFST[3-0], does that answer your question?

    Regards,
    Cody

  • 0 in reply to Cody Watkins
    TI__Intellectual 2540 points
    Hi Cody,

    The situation was the UART communication happen FE and OE condition.
    Customer do SW RESET to clear the status but the following RX data was not correct.
    According to the datasheet , the SW RESET bit will clear the status flag and reset the statemachine.
    So specified the question was
    1. When do SW RESET , how much clock it need to take a new START operation
    2.if the RXSHF Register had new started to received bit data , what happen when enable the SW RESET.
    Is the internal counters for RXSHF reset together and start to recognize the new data ???

    They are trying to do was they need to explain why they receive data could be rush.
    Please help us.

    Thanks a lot.

    BR
    Brian Chang
  • 0 in reply to Brian Chang90901
    TI__Mastermind 42195 points

    Brian,

    sorry for the delayed response.

    1. I don't expect more than a few cycles. If this is critical for the customer I can try to dig up the exact number.

    2. If the customer wants to discard old values and immediately start to capture new values after reset they can flush the FIFO registers using RXFIFO Reset and TXFIFO Reset.

    Regards,
    Cody