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TMS320F28377D: eCAP rising edge detection

Part Number: TMS320F28377D


Hi all,

I use GPIO24 as eCAP input pin and configure eCAP for rising edge event, should I follow electrical parameters of GPIO24? The minimum VIH = 2.0V and maximum VIL = 0.8V?

If the answer of statement above is positive, I will have the questions below,

  • Does it mean when the voltage input on GPIO24 change from 0V to 2.0V, it will have an eCAP event?
  • Is there any voltage rising time spec?
  • No eCAP hysteresis, is this correct?

Please advise your idea if any, thanks.

 

Regards,

Luke

  • Hi Luke,

    Yes, you need to follow the datasheet for GPIO24 input voltage requirements i.e. as you stated minimum VIH=2V & max VIL=0.8V.

    Here are the answers to your further questions:

    Does it mean when the voltage input on GPIO24 change from 0V to 2.0V, it will have an eCAP event?
    - Yes it should, but since 2V is the minimum VIH, I would go beyond 2V, at spec voltage i.e. VDDIO to guarantee the event.

    Is there any voltage rising time spec?
    - We have output timing spec for GPIO (section GPIO-Output Timing), but in your case you are using GPIO24 as the input to eCAP, we do not have spec for internal switching characteristics, but it will definitely be faster than output switching times.

    No eCAP hysteresis, is this correct?
    - Yes, only hysteresis here will be on GPIO.

    Thanks & Regards,
    Nirav
  • Hi Nirav,

    Thanks for your response.

    According to datasheet, the maximum GPIO output rising time is 8ns. So, we should be able to take this as the maximum eCAP input specification, it means that voltage input on GPIO24 should go VDDIO within 8ns.

    Does it make sense?

    Best regards,

    Luke

  • Hi Luke,

    Rising time of 8ns on GPIO is the output switching characteristic, when signal goes from low to high. As far as input switching time, it should be much faster. As long as the input signal switches from 0V to VDDIO (regardless of time) internally signal should be latched fairly quickly. To answer your question, there is not requirement on rising time for the input on GPIO24, for ECAP to capture a rising edge it needs voltage on GPIO24 to rise to 2V or above (as per the spec to VDDIO voltage). Internally it triggers a rising edge as soon as GPIO24 crosses minimum VIH spec of 2V.

    Regards,
    Nirav
  • Hi Nirav,

    My customer is facing a system noise problem and eCAP doesn't work well. To have noise immunity, we add a RC low pass filter at eCAP input and use GPIO input qualification function, seems that eCAP works well now.

    As you know, adding a RC low pass filter will change input voltage rising time/slope, we want to make sure we are adding appropriate LPF and having correct GPIO input qualification setting, this is the reason why we are asking the GPIO/eCAP input rising time spec.

    The GPIO input switching time should be much faster than 8ns, if we take 8ns as the maximum eCAP input rising time spec and then determine R, C for LPF and parameters for GPIO qualification, is this reasonable?

    Regards,
    Luke
  • Hi Luke,

    Ok, I understand now what your concerns are.

    Once again the output characteristics and input characteristics of GPIO are completely different, so using 8ns number for input timing is irrelevant. But if you just want a number to design RC LPF filter, I would suggest design your system with fastest possible Rise/Fall time (2n, 5ns or 8ns any value that is acceptable from system requirement), making sure that it is not noisy and the input voltage goes to VDDIO voltage and stays there until next event occurs.

    Best Regards,
    Nirav