Part Number: TMS320F28335
Other Parts Discussed in Thread: CONTROLSUITE
Tool/software: Code Composer Studio
I want to read ADC results using DMA. I revised the example provided in CONTROLSUITE. The sampled signal is correct when the DAM configured as
DMACH1ModeConfig(DMA_SEQ1INT,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,
OVRFLOW_DISABLE,SIXTEEN_BIT,CHINT_END,CHINT_ENABLE);
But It can only run one time, then the DMA is stopped. To run it again, I need to do compile again. When I change 'CONT_DISABLE' to 'CONT_ENABLE', it can run several times for one compilation. But the read results are not corretly, as shown in the figure. There are discontinuous points in the results read by DMA. The ADC and DMA configurations are shown below. Please help me, thanks.
// Configure ADC
AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;
AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // 1 Cascaded mode
AdcRegs.ADCTRL3.bit.SMODE_SEL = 0; // Setup simultaneous sampling mode
// AdcRegs.ADCMAXCONV.all = 0x0000; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA0 as 1st SEQ1 conv.
// AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
AdcRegs.ADCCHSELSEQ1.all = 0x0; // Initialize all ADC channel selects to A0
AdcRegs.ADCCHSELSEQ2.all = 0x0;
AdcRegs.ADCCHSELSEQ3.all = 0x0;
AdcRegs.ADCCHSELSEQ4.all = 0x0;
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0xF; // convert and store in 8 results registers
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.half.CMPA = 0x1; // Set compare A value
EPwm1Regs.TBPRD = 0x2; // Set period for ePWM1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
DMAInitialize();
// Clear Table
for (i=0; i<BUF_SIZE; i++)
{
DMABuf1[i] = 0;
}
// Configure DMA Channel
DMADest = &DMABuf1[0]; //Point DMA destination to the beginning of the array
DMASource = &AdcMirror.ADCRESULT0; //Point DMA source to ADC result register base
DMACH1AddrConfig(DMADest,DMASource);
DMACH1BurstConfig(15,1,1); //16 words per burst
DMACH1TransferConfig(15,0,16); //16 bursts per transfer
DMACH1WrapConfig(0,0,0,16);
DMACH1ModeConfig(DMA_SEQ1INT,PERINT_ENABLE,ONESHOT_DISABLE,CONT_ENABLE,SYNC_DISABLE,SYNC_SRC,
OVRFLOW_DISABLE,SIXTEEN_BIT,CHINT_END,CHINT_ENABLE);
StartDMACH1();
while(1)
{};
Cathy