Tool/software: Code Composer Studio
Hello, I recently created my first project in CCS 6 with F2808(I use this microcontroller for the first time). It's a simple project, were I init CLK only, I use function InitSysCtrl(). I also use standart linker command file F2808.cmd(I don't change it). But my code is loop at line: while (SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1), that means pll is locked.
Clock configuration: OSCCLK - 20, CLKINDIV - 2, PLLCR - 10.
F2808.rar F2808.cmd
If someone know reason of this problem - please help me
#include "DSP280x_Device.h"
void InitSysCtrl(void)
{
volatile Uint16 i; // General purpose Uint16
volatile int16 dummy; // General purpose volatile int16
EALLOW; // Enable EALLOW protected register access
DevEmuRegs.PROTSTART = 0x0100; // Write default value to protection start register
DevEmuRegs.PROTRANGE = 0x00FF; // Write default value to protection range register
dummy = CsmPwl.PSWD0; // Dummy read of PWL locations
dummy = CsmPwl.PSWD1; // Dummy read of PWL locations
dummy = CsmPwl.PSWD2; // Dummy read of PWL locations
dummy = CsmPwl.PSWD3; // Dummy read of PWL locations
dummy = CsmPwl.PSWD4; // Dummy read of PWL locations
dummy = CsmPwl.PSWD5; // Dummy read of PWL locations
dummy = CsmPwl.PSWD6; // Dummy read of PWL locations
dummy = CsmPwl.PSWD7; // Dummy read of PWL locations
SysCtrlRegs.WDCR = 0x00E8;
SysCtrlRegs.SCSR = 0x0000;
// Make sure the PLL is not running in limp mode
if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1)
{ // PLL is not running in limp mode
SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1; // Turn off missing clock detect before setting PLLCR
SysCtrlRegs.PLLCR.bit.DIV = 0x000A; // PLLx5
while (SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1)
{ // Wait for PLLLOCKS bit to set
SysCtrlRegs.WDKEY = 0x0055; // Service the watchdog while waiting
SysCtrlRegs.WDKEY = 0x00AA; // in case the user enabled it.
}
SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0; // Enable missing clock detect circuitry
}
else { // PLL is running in limp mode
asm(" ESTOP0");
}
/*** Configure the clocks ***/
SysCtrlRegs.HISPCP.all = 0x0004; // Hi-speed periph clock prescaler, HSPCLK=SYSCLKOUT/8
SysCtrlRegs.LOSPCP.all = 0x0002; // Lo-speed periph clock prescaler, LOSPCLK=SYSCLKOUT/4
SysCtrlRegs.PCLKCR1.bit.EQEP2ENCLK = 1; // SYSCLKOUT to eQEP2 enabled
SysCtrlRegs.PCLKCR1.bit.EQEP1ENCLK = 1; // SYSCLKOUT to eQEP1 enabled
SysCtrlRegs.PCLKCR1.bit.ECAP4ENCLK = 1; // SYSCLKOUT to eCAP4 enabled
SysCtrlRegs.PCLKCR1.bit.ECAP3ENCLK = 1; // SYSCLKOUT to eCAP3 enabled
SysCtrlRegs.PCLKCR1.bit.ECAP2ENCLK = 1; // SYSCLKOUT to eCAP2 enabled
SysCtrlRegs.PCLKCR1.bit.ECAP1ENCLK = 1; // SYSCLKOUT to eCAP1 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1; // SYSCLKOUT to ePWM6 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1; // SYSCLKOUT to ePWM5 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1; // SYSCLKOUT to ePWM4 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1; // SYSCLKOUT to ePWM3 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1; // SYSCLKOUT to ePWM2 enabled
SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1; // SYSCLKOUT to ePWM1 enabled
SysCtrlRegs.PCLKCR0.bit.ECANBENCLK = 1; // SYSCLKOUT to eCAN-B enabled
SysCtrlRegs.PCLKCR0.bit.ECANAENCLK = 1; // SYSCLKOUT to eCAN-A enabled
SysCtrlRegs.PCLKCR0.bit.SCIBENCLK = 1; // LSPCLK to SCI-B enabled
SysCtrlRegs.PCLKCR0.bit.SCIAENCLK = 1; // LSPCLK to SCI-A enabled
SysCtrlRegs.PCLKCR0.bit.SPIBENCLK = 1; // LSPCLK to SPI-B enabled
SysCtrlRegs.PCLKCR0.bit.SPIAENCLK = 1; // LSPCLK to SPI-A enabled
SysCtrlRegs.PCLKCR0.bit.SPIDENCLK = 1; // LSPCLK to SPI-D enabled
SysCtrlRegs.PCLKCR0.bit.SPICENCLK = 1; // LSPCLK to SPI-C enabled
SysCtrlRegs.PCLKCR0.bit.I2CAENCLK = 1; // SYSCLKOUT to I2C enabled
SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; // HSPCLK to ADC enabled
SysCtrlRegs.LPMCR0.all = 0x00FC;
SysCtrlRegs.XCLK.bit.XCLKOUTDIV = 2;
EDIS;
}
int main(void)
{
InitSysCtrl();
}