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TMS320F28035: TZ1 cannot trip ePWM1/ePWM2/ePWM3/ePWM4 synchronously

Part Number: TMS320F28035

Hi Champs,

My customer is designing charging pile power module using F28035. During their testing, they found ePWM2 cannot be tripped by TZ1 synchronous with ePWM1/ePWM3/ePWM4 with 800ms delay. Please find the scope capture as follows.

And also they were reading TZ register from F28035, and also found ePWM2 OST flag was not set while TZ1 happened.

序号

Vo

EPWM1.OST

EPWM2.OST

EPWM3.OST

EPWM4.OST

备注

1

106.36

1

0

1

1

 

2

71.915

1

0

1

1

 

3

55.42

1

0

1

1

 

4

52.037

1

0

1

1

 

5

50.216

1

0

1

1

 

6

49.592

1

0

1

1

 

7

47.874

1

0

1

1

 

From their ePWM initialization code, the ePWM setting code is OK.

So would you kindly help to check this issue?

Thanks a lot.

BR,

Young

  • Young,
    I don't understand what the customer is trying to do. What are they trying to do with the TZs?

    Do they want the 800mS delay for ePWM2?

    Regards,
    Cody
  • Cody,
    What they are what is shutting down the 4 channels PWM output synchronously. But under some system testing condition, there is an unwanted delay on ePWM2. In this condition, power module's output is about 200V and 10.8A. The failure rate is about 50%.
    Regards,
    Young
  • Cody,
    Any update?

    Thanks,
    Young
  • Cody,
    We want shun down EPWM1/2/3/4 synchronously to protect the power module when TZ1 trapped, as Young Hu' reply. But once we enable TZ1 to forcelow EPWM1/2/3/4, the EPWM2 or EPWM2/3/4 will delay force low when power module's output is about 200V@10.8A(may be EMI or something).
    so what can be done to resolve this problem? and under what kind of condition cause the F28035'S TZ1 forcelow EPWM1/2/3/4 unsynchronously?
    Regards,
    Lv
  • Young,

    Can you show a more detailed view of the TZ signal? Is it noisy? Is the TZ signal longer than the minimum of 3 cycles?

    Try switching to synchronous input qualification and see if that affects the behavior. 

    Regards,
    Cody 

  • cody,

        I am Young's customer, my TzGpio configure function as flow:

    void InitTzGpio(void)
    {
       EALLOW;

       GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;    // Enable pull-up on GPIO12 (TZ1)

       GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;  // Asynch input GPIO12 (TZ1)

       GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;  // Configure GPIO12 as TZ1

       EDIS;

    }

        you mean the red backcolor' configure switching to flow configure?

       GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 1;  // Qualification using 3 samples

       right?

    Regards,

    Lv

  • Lv,

    yes please test the code with that change, you also could try "GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 2;". What are the results?

    Can you show me an oscilloscope picture with the TZ signal, PWM1 and the delayed PWM? I would like to see a closer view, something like 2uS before the Trip, and 5uS after the Trip.

    Regards,
    Cody 

  • cody,

        we set power module output 200V@10.8A and monitor the tz1 signal with scope as flow. CH1/2 is EPWM1/2, ch3 is tz1 signal. There is an unwanted delay on EPWM2 when i configure the tz1 gpio as asynch input. It's noisy.

        As your suggest, we qualification TZ1 input using 3 or 6 samples, this performs has gone. The power module could stable run without unwanted shutdown, although there is no clean tz1 signal.

        We will try to resolve the tz1 signal's unwanted drop. can you give us some advice on how to improve the tz1 signal? Thanks.

    Regsrds,

    Lv

  • Lv,

    it looks like you are having a drive strength issue, is there a lot of capacitance on that node? Maybe you have a weak driver?

    Keep me updated!

    Regards,
    Cody